Viresh Paruthi  Viresh Paruthi photo       

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STSM Formal Verification, Member Academy of Technology
Austin TX, USA



Viresh Paruthi is Technical Leader for Formal Verification at IBM's Systems group.  In this role, Viresh is responsible for directing formal verification methodology, application, execution and strategic direction on H/W development projects. Prior to this Viresh assumed a central role in the design and development of SixthSense, IBM's semi-formal verification toolset and sequential equivalence checker, and Verity, IBM's combinational equivalence checker. Viresh is well-recognized at IBM and externally as an expert in the Formal Verification space and has co-authored numerous patents and papers. He is a member of the IBM Academy of Technology (AoT).