Wire synthesis combines buffering with layer assignment to both optimize delay and fix electrical violations by utilizing thick metal where appropriate. One can use it within PDS or as a set of micro-opts, as part of BuffOpt. It is suggested to run router to analyze the impact of layer assignment. The new techniques/algorithms are LASR(Layer Assignment for Slew Recovery) and LADY (Layer Assignment for Delay Optimization) algorithms.
Starting from 65 nm, designs can not be closed with traditional approaches, such as some blocks are too large to cross, too much wiring congestion in alleys going around blocks with buffering, holes in blocks not integrated with existing wire synthesis, and thousands or more violations left unfixed. From some 65 nm technology data, we found that signals can travel about 2X and 3.5X further and obtain 2x and 3X delay reduction, respectively for the 2x and 4x layers.