Systems Technology and Microarchitecture - Publications
The Optimum Pipeline Depth of a Processor
A. Hartstein, T. R. Puzak
In the Proceedings of the 29th annual international symposium on computer architecture, 2002, Pages: 7-13.
Exploring the Limits of Prefetching
P.G. Emma, A. Hartstein, T.R. Puzak, V. Srinivasan,
IBM Journal of Research and Development, Volume 49 , Issue 1 (January 2005) , Pages: 127-144.
Cache Miss Behavior: is it √2?
A. Hartstein, V. Srinivasan, T. R. Puzak, P. G. Emma
In the Proceedings of the 3rd conference on computing frontiers, 2006, Pages: 313-320.
An Analysis of the Effects of Miss Clustering on the Cost of a Cache Miss
In the Proceedings of the 4th conference on computing frontiers, 2007.
T. R. Puzak, A. Hartstein, P. G. Emma, V. Srinivasan, J. Mitchell.