eLite DSP Project - Patents


Patent applications filed

  • Apparatus And Method For Updating Pointers For Indirect And Parallel Register Access
  • A Method for Modeling Non-interlocked Diversely Bypassed Exposed Pipeline Processors for Static Scheduling
  • Digital signal processor with cascaded SIMD organization and flexible data manipulation
  • Digital signal processor with cascaded SIMD organization
  • Viterbi decoding for SIMD vector processors with indirect vector element access
  • Two's Complement Array Multiplier for Signed and Unsigned Numbers
  • Selective bypassing of a multiported register file
  • Vector register file with arbitrary vector addressing

Invention disclosures published

  • Resource usage analysis method for statically-scheduled non-interlocked pipelined processors