Energy Secure Systems Architecture - Organizers
Augusto Vega is a Research Staff Member within the Reliability and Power-Aware Microarchitecture department at IBM T. J. Watson Research Center. He has been involved in research and development work in support of IBM System p and Data Centric Systems. His primary focus area is power-aware computer architectures and associated system solutions. He has developed techniques to reduce chip power consumption in multicore/manycore chips for multi-threaded applications, exploiting core folding, frequency/voltage scaling and low-power ("sleep") modes. His research interests are in the areas of high performance, power/reliability-aware computer architectures, distributed and parallel computing, and performance analysis tools and techniques.
He received a Ph.D. degree on "Computer Architecture" and a M.Sc. degree on "Computer Architecture, Networks and Systems" from Polytechnic University of Catalonia (UPC), Spain.
Alper Buyuktosunoglu received PhD degree in electrical and computer engineering from University of Rochester. Currently, he is a Research Staff Member in Reliability and Power-Aware Microarchitecture department at IBM T. J. Watson Research Center. He has been involved in research and development work in support of IBM p-series and z-series systems in the area of power-aware computer architectures. His research interests are in the area of high performance, power/reliability-aware computer architectures. He has over 50 pending/issued patents, has received several IBM-internal awards, has published over 50 papers, and has served on various conference technical program committees in this area. Dr. Buyuktosunoglu is an IBM Master Inventor and a senior member of the IEEE. He is currently serving on the editorial board of IEEE MICRO.
Pradip Bose is a Research Staff Member and Manager of the Reliability- and Power-Aware Microarchitecture department at IBM T. J. Watson Research Center at Yorktown Heights, NY. He has been with IBM Research for over 27 years and has been involved in the architecture definition and associated pre-silicon modeling of the full range of IBM POWER-series microprocessors, beginning with the pioneering RISC super scalar research project in the early eighties. Pradip has a PhD from University of Illinois at Urbana-Champaign and is the author or co-author of over 80 peer-reviewed publications. He holds the title of “Master Inventor” within IBM in recognition of his patent portfolio, and is also a member of the IBM Academy of Technology. He has been actively involved in various IEEE/ACM conference committees and is the past editor-in-chief of IEEE Micro. He has given numerous past tutorials at conferences: ISCA, MICRO, HPCA, Sigmetrics, ICS, VLSI Design, VLSI Test Symposium, International Test Conference, etc. He is a Fellow of IEEE and a Senior Member of ACM.