Merav Aharoni  Merav Aharoni photo       

contact information

Manager of Processor Verification Technologies Group
Haifa Research Lab, Haifa, Israel
  +972dash4dash829dash6418

links



2016

Using Graph-Based CSP to Solve the Address Translation Problem
Aharoni, Merav and Ben-Haim, Yael and Doron, Shai and Koyfman, Anatoly and Tsanko, Elena and Veksler, Michael
International Conference on Principles and Practice of Constraint Programming, pp. 843--858, 2016
Abstract


2015

Rectangle Placement for VLSI Testing
Aharoni, Merav and Boni, Odellia and Freund, Ari and Goren, Lidor and Ibraheem, Wesam and Segev, Tamir
International Conference on AI and OR Techniques in Constriant Programming for Combinatorial Optimization Problems, pp. 18--30, 2015
Abstract


2011

Simulation-based verification of floating-point division
Guralnik, Elena and Aharoni, Merav and Birnbaum, Ariel J and Koyfman, Anatoly
IEEE Transactions on Computers 60(2), 176--188, IEEE, 2011
Abstract

Injecting Floating-Point Testing Knowledge into Test Generators
Merav Aharoni, Emanuel Gofman, Elena Guralnik and Anatoly Koyfman
Haifa Verification Conference (HVC), 2011

Floorplanning challenges in early chip planning
Jeonghee Shin, John A Darringer, Guojie Luo, Merav Aharoni, Alexey Y Lvov, G Nam, Michael B Healy
SOC Conference (SOCC), 2011 IEEE International, pp. 388--393


2007

Solving Constraints on the Intermediate Result of Decimal Floating-Point Operations
Merav Aharoni, Ron Maharik, Abraham Ziv
Computer Arithmetic, 2007. ARITH'07. 18th IEEE Symposium on, pp. 38--45

Decimal floating-point in z9: an implementation and testing perspective
A.Y.Duale, M.H.Decker, H.G.Zipperer, M. Aharoni, T. J. Bohizic
IBM Journal of Research and Development 51(1/2), 217 - 228, 2007


2005

Solving Constraints on the Invisible Bits of the Intermediate Result for Floating-Point Verification
Merav Aharoni, Sigal Asaf, Ron Maharik, Ilan Nehama, Ilya Nikulshin, Abraham Ziv
Arith 17, pp. 76 - 83, 2005


2003

FPgen-a test generation framework for datapath floating-point verification
Aharoni, Merav and Asaf, Sigal and Fournier, Laurent and Koifman, Anatoly and Nagel, Raviv
High-Level Design Validation and Test Workshop, 2003. Eighth IEEE International, pp. 17--22
Abstract

Solving Range Constraints for Binary Floating-Point Instructions
Abraham Ziv, Merav Aharoni, Sigal Asaf
Arith 16, pp. 158-164, 2003


2002

An effective and flexible approach to functional verification of processor families
Malandain, D.; Palmen, P.; Taylor, M.; Aharoni, M.; Arbetman, Y.
High-Level Design Validation and Test Workshop, 2002




Technical Areas