Akihiro Horibe  Akihiro Horibe photo       

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Research Staff Member - Neuromorphic Hardware
IBM Research - Tokyo, Kawasaki, Japan
  +81dash50dash3150dash5229

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2015

Vertical integration after Stacking (ViaS) Process for Low-cost and Low-stress 3D Silicon Integration
K. Sueoka, A. Horibe, T. Aoki, K. Kohara, K. Toriyama, H. Mori, and Y. Orii
The IEEE 2015 International 3D Systems Integration Conference (3DIC)

Through Silicon Via Process for Effective Multi-Wafer Integration
A. Horibe, K. Sueoka, T. Aoki, K. Toriyama, K. Okamoto, S. Kohara, H. Mori, and Y. Orii
Electronic Components and Technology Conference (ECTC), 2015 IEEE 65th


2014

Core Technologies for Breaking into Cognitive Computing Era
Akihiro Horibe, Takeo Yasuda, Toshiyuki Yamane, Seiji Takeda, Yasumitsu Orii
Journal of The Japan Institute of Electronics Packaging 17(3), The Japan Institute of Electronics Packaging, 2014


Wafer-level non conductive films for exascale servers
A Horibe, S Kohara, H Mori, Y Orii
Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th, pp. 803--807

Fine-pitch solder joining for high density interconnection
Kuniaki Sueoka, Sayuri Kohara, Akihiro Horibe, Fumiaki Yamada, Hiroyuki Mori, Yasumitsu Orii
Electronics Packaging (ICEP), 2014 International Conference on, pp. 600--603


2013

Thermo-mechanical evaluation of 3D packages
Sayuri Kohara, Akihiro Horibe, Kuniaki Sueoka, Keiji Matsumoto, Fumiaki Yamada, Hiroyuki Mori, Yasumitsu Orii
3D Systems Integration Conference (3DIC), 2013 IEEE International, pp. 1--4

No Clean Flux technology for large die flip chip packages
Akihiro Horibe, Kang-Wook Lee, Keishi Okamoto, Hiroyuki Mori, Yasumitsu Orii, Yuki Nishizako, Osamu Suzuki, Yukio Shirai
Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd, pp. 688--693

Scaling challenges of packaging in the Era of Big Data
Yasumitsu Orii, Akihiro Horibe, Kazushige Toriyma, Keiji Matsumoto, Hirokazu Noma, Sayuri Kohara, Kuniaki Sueoka, Hiroyuki Mori
VLSI Technology (VLSIT), 2013 Symposium on, pp. T40--T41

Thermally enhanced pre-applied underfills for 3D integration
Akihiro Horibe, Keishi Okamoto, Hiroyuki Mori, Yasumitsu Orii, Kohichiro Kawate, Yorinobu Takamatsu, Hiroko Akiyama
Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd, pp. 909--914


2012

Thermomechanical Design for Fine Pitch 3D-IC Packages
Akihiro Horibe, Sayuri Kohara, Kuniaki Sueoka, Keiji Matsumoto, Yasumitsu Orii, Fumiaki Yamada (ASET)
International Microelectronics Assembly and Packaging Society (IMAPS), 2012

Effect of Underfill Properties on Thermomechanical Stress in Fine Pitch 3D-IC Package
Akihiro Horibe, Sayuri Kohara, Kuniaki Sueoka, Keiji Matsumoto, Yasumitsu Orii, Fumiaki Yamada (ASET)
Electronics Packaging (ICEP), 2012 International Conference on

Thermal stress analysis of die stacks with fine-pitch IMC interconnections for 3D integration
Sayuri Kohara, Akihiro Horibe, Kuniaki Sueoka, Keiji Matsumoto, Fumiaki Yamada, Yasumitsu Orii, Katsuyuki Sakuma, Takahiro Kinoshita, Takashi Kawakami
3D Systems Integration Conference (3DIC), 2011 IEEE International, pp. 1--7, 2012

Thermal stress and die-warpage analyses of 3D die stacks on organic substrates
Sayuri Kohara, Kuniaki Sueoka, Akihiro Horibe, Keiji Matsumoto, Fumiaki Yamada, Yasumitsu Orii
CPMT Symposium Japan, 2012 2nd IEEE, pp. 1--4


2011

High Density 3D TSV Chip Integration Process
Akihiro Horibe, Kuniaki Sueoka, Katsuyuki Sakuma, Sayuri Kohara, Keiji Matsumoto, Hidekazu Kikuchi, Yasumitsu Orii, Toshiro Mitsuhashi, Fumiaki Yamada (ASET)
Electronics Packaging (ICEP), 2011 International Conference on

Vacuum underfill technology for advanced packaging (IMPACT 2011)
M. Hoshiyama, M. Hasegawa, T. Sato, H. Yoshii, O. Suzuki, K. Kotaka, T. Nagasaka, A. Horibe, M. C. Paquet, M. Gaynes, C. Feger, K. Sakuma, J. U. Knickerbocker, Y. Orii, K. Terada, K. Ishikawa, Y. Hirayama
2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), pp. 42-46

Vacuum underfill technology for advanced packaging
A. Horibe, M. C. Paquet, M. Gaynes, C. Feger, K. Sakuma, J. U. Knickerbocker, Y. Orii, M. Hoshiyama, M. Hasegawa, T. Sato, H. Yoshii, O. Suzuki, K. Kotaka, T. Nagasaka, K. Terada, K. Ishikawa, Y. Hirayama
2011 IEEE 61st Electronic Components and Technology Conference (ECTC), pp. 1003-1008

TSV Diagnostics by X-ray Microscopy
Kuniaki Sueoka, Fumiaki Yamada, Akihiro Horibe, Hidekazu Kikuchi, Katsunori Minami, Yasumitsu Orii
Electronics Packaging Technology Conference (EPTC), 2011 IEEE 13th, pp. 695--698


2010

3D integrated chip with high density through silicon vias and its reliability study
Akihiro Horibe, Katsuyuki Sakuma, Keiji Matsumoto, Sayuri Kohara, Kuniaki Sueoka, Yasumitsu Orii, Fumiaki Yamada (ASET)
3D System Integration, 2010. 3DIC 2010. IEEE International Conference on

A Structural Design Rule of Advanced 3D Integrated Semiconductor Device with Fine Pitch Interconnections
Akihiro Horibe, Keiji Matsumoto, Fumiaki Yamada (ASET)
Electronics Packaging (ICEP), 2010 International Conference on


2009

Inter Chip Fill for 3D Chip Stack
A. Horibe, F. Yamada, C. Feger, J. U. Knickerbocker
Electronics Packaging (ICEP), 2009 International Conference on

Advanced 3D chip stack process for thin dies with fine pitch bumps using pre-applied inter chip fill
Akihiro Horibe, Fumiaki Yamada
3D System Integration, 2009. 3DIC 2009. IEEE International Conference on, pp. 1--4

Inter chip fill for 3D chip stack
Akihiro Horibe, Fumiaki Yamada, C Feger, JU Knickerbocker
Transactions of The Japan Institute of Electronics Packaging 2(1), 160--162, The Japan Institute of Electronics Packaging, 2009


2008

High Channel Count Connector for Optical Interconnect
Yoichi Taira, Fumiaki Yamada, Akihoro Horibe, Shigeru Nakagawa, Sayuri Kohara, Hidetoshi Numata
Optical Fabrication and Testing, pp. OWC7, 2008