Kuniaki Sueoka  Kuniaki Sueoka photo       

contact information

Advisory Researcher - EOP
IBM Research - Tokyo, Japan
  +81dash50dash3150dash4098

links



2013



2012


Method for forming studs used for self-alignment of solder bumps
Sayuri Hada, Katsuyuki Sakuma, Kuniaki Sueoka, Kazushige Toriyama
US Patent App. 13/677,538


2009

Chip-to-wafer integration technology for three-dimensional chip stacking
Katsuyuki Sakuma, Paul Stephen Andry, Kuniaki Sueoka, John Ulrich Knickerbocker
US Patent 7,514,290



2008



2007

Sheet having high thermal conductivity and flexibility
Sayuri Hada, Kuniaki Sueoka, Yoichi Taira
US Patent App. 12/303,804

Optical device and color display unit using the optical device
Hidetoshi Numata, Yoichi Taira, Kuniami Sueoka
US Patent 7,313,309



2005


Three level stacked reflective display
Keiji Matsumoto, Lubomyr Taras Romankiw, Kuniaki Sueoka, Yoichi Taira, Keizoh Takeda
US Patent 6,844,957


2002



1993

Magnetic field observation with tunneling microscopy
Osaaki Watanuki, Fuminori Sai, Kuniaki Sueoka
US Patent 5,266,897


1989