Filipp A. Akopyan  Filipp A. Akopyan photo       

contact information

Research / Brain-Inspired Computing (SyNAPSE) / Team Lead - Hardware
T. J. Watson Research Center, NY USA / Almaden Research Center, CA USA
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Professional Associations

Professional Associations:  IEEE   |  IEEE Circuits and System Society  |  IEEE Signal Processing Society


2016

TrueNorth Ecosystem for Brain-Inspired Computing: Scalable Systems, Software, and Applications
J Sawada, F Akopyan, A Cassidy, B Taba, M Debole, P Datta, R Alvarez-Icaza, A Amir, J Arthur, A Andreopoulos, et al.
Proceedings of Supercomputing 2016
Abstract

Hybrid Synchronous-Asynchronous Tool Flow for Emerging VLSI Design
Akopyan F, Ortega-Otero C, and Manohar R.
Proceedings of IEEE International Workshop on Logic Synthesis, 2016
Abstract


2015

TrueNorth: Design and Tool Flow of a 65mW 1 Million Neuron Programmable Neurosynaptic Chip
Akopyan F, Sawada J, Cassidy A, Alvarez-Icaza R, Arthur J, Merolla P, Imam N, Nakamura Y, Datta P, Nam G, Taba B, Beakes M, Brezzo B, Kuang JB, Manohar R, Risk W, Jackson B, and Modha D.
IEEE Transactions on Computer Aided Design (TCAD), 2015
Abstract   Keynote Paper


2014

Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100x Speedup in Time-to-Solution and ~100,000x Reduction in Energy-to-Solution
Cassidy A, Alvarez-Icaza R, Akopyan F, Sawada J, Arthur J, Merolla P, Datta P, Gonzalez Tallada M, Taba B, Andreopoulos A, Amir A, Esser A, Kusnitz J, Appuswamy R, Haymes C, Brezzo B, Moussalli R, Bellofatto R, Baks C, Mastro M, Schleupen K, Cox C, Inoue
Supercomputing 2014 (SC14)
Abstract   Gordon Bell Prize Finalist

A million spiking-neuron integrated circuit with a scalable communication network and interface
Paul A. Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Andrew S. Cassidy, Jun Sawada, Filipp Akopyan, Bryan L. Jackson, Nabil Imam, Chen Guo, Yutaka Nakamura, Bernard Brezzo, Ivan Vo, Steven K. Esser, Rathinakumar Appuswamy, Brian Taba, Arnon Amir, Myron
Science 345(6197), 668--673, American Association for the Advancement of Science, 2014


2013

Cognitive Computing Building Block: A Versatile and Efficient Digital Neuron Model for Neurosynaptic Cores
Cassidy A, Merolla P, Arthur J, Esser S, Jackson B, Alvarez R, Datta P, Sawada J, Wong T, Feldman V, Amir A, Rubin D, Akopyan F, McQuinn E, Risk W, and Modha D.
International Joint Conference on Neural Networks, 2013
Abstract


2012

Building Block of a Programmable Neuromorphic Substrate: A Digital Neurosynaptic Core
Arthur J, Merolla P, Akopyan F, Alvarez R, Cassidy A, Chandra S, Esser S, Imam N, Risk W, Rubin D, Manohar R, and Modha D.
International Joint Conference on Neural Networks, 2012
Abstract

Implementation of Olfactory Bulb Glomerular Layer Computations in a Digital Neurosynaptic Core
Imam N, Cleland T, Manohar R, Merolla P, Arthur J, Akopyan F, and Modha D.
Frontiers in Neuroscience Journal, volume 6, number 00083, 2012
Abstract

A Digital Neurosynaptic Core Using Event-Driven QDI Circuits
Imam N, Akopyan F, Merolla P, Arthur J, Manohar R, and Modha D.
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 2012
Abstract   Best Paper Award


2011

HYBRID SYNCHRONOUS / ASYNCHRONOUS DESIGN
Filipp A. Akopyan
Ph.D. Thesis, 2011
Abstract

A Digital Neurosynaptic Core Using Embedded Crossbar Memory with 45pJ per Spike in 45nm
Merolla P, Arthur J, Akopyan F, Imam N, Manohar R, and Modha D.
Proceedings of the IEEE Custom Integrated Circuits Conference (CICC), 2011
Abstract


2008

Variability in 3-D Integrated Circuits
Akopyan F, Ortega-Otero C, Fang D, Jackson S, and Manohar R.
IEEE Custom Integrated Circuits Conference, 2008
Abstract


2006

Self-timed thermally-aware circuits
Fang D, Akopyan F, and Manohar R.
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2006
Abstract

A level-crossing flash asynchronous analog-to-digital converter
Akopyan F, Manohar R, and Apsel A.
IEEE International Symposium on Asynchronous Circuits and Systems, 2006
Abstract   Best Paper Award