Dureseti (Chidu) Chidambarrao  Dureseti  (Chidu) Chidambarrao photo       

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STSM-DfM; Master Inventor

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Professional Associations

Professional Associations:  Electrochemical Society (ECS)  |  IBM Academy of Technology  |  IBM Industry Academy  |  IEEE   |  IEEE Electron Devices Society (EDS)  |  IEEE Member  |  Materials Research Society (MRS)


2014

High performance 14nm SOI FinFET CMOS technology with 0.0174$mu$m 2 embedded DRAM and 15 levels of Cu metallization
Lin, CH and Greene, B and Narasimha, S and Cai, J and Bryant, A and Radens, C and Narayanan, V and Linder, B and Ho, H and Aiyar, A and others
2014 IEEE International Electron Devices Meeting, pp. 3--8
Abstract

High performance 14nm SOI FinFET CMOS technology with 0.0174$mu$m 2 embedded DRAM and 15 levels of Cu metallization
Lin, CH and Greene, B and Narasimha, S and Cai, J and Bryant, A and Radens, C and Narayanan, V and Linder, B and Ho, H and Aiyar, A and others
2014 IEEE International Electron Devices Meeting, pp. 3--8
Abstract


2011

Channel Strain Characterization in Semiconductor Device by Techniques Based on Transmission Electron Microscope
Li, Jinghong and Johnson, Jeff and Chidambarrao, Dureseti and Wang, Yunyu and Domenicucci, Anthony G
MRS Proceedings, pp. mrss11--1349, 2011
Abstract

Methodology for balancing design and process tradeoffs for deep-subwavelength technologies
Graur, Ioana and Wagner, Tina and Ryan, Deborah and Chidambarrao, Dureseti and Kumaraswamy, Anand and Bickford, Jeanne and Styduhar, Mark and Wang, Lee
SPIE Advanced Lithography, pp. 79740C--79740C, 2011
Abstract


2010

Study of silicon strain in shallow trench isolation
Belyansky, M and Klymko, N and Conti, R and Chidambarrao, D and Liu, F
Journal of Vacuum Science & Technology A 28(4), 829--833, AVS: Science & Technology of Materials, Interfaces, and Processing, 2010
Abstract


2009

Reduction of RTA-driven intra-die variation via model-based layout optimization
Scott, JC and Gluschenkov, O and Goplen, B and Landis, H and Nowak, E and Clougherty, F and Mocuta, A and Hook, T and Zamdmer, N and Lai, CW and others
2009 Symposium on VLSI Technology, pp. 152--153
Abstract


2008

Analysis of systematic variation and impact on circuit performance [6925-19]
Banerjee, S and Elakkumanan, P and Chidambarrao, D and Culp, J and Orshansky, M
PROCEEDINGS-SPIE THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING, pp. 6925, 2008

Tutorial 4: DFM Revisited: A Comprehensive Analysis of Variability at all Levels of Abstraction
Gupta, P and Chidambarrao, D and Elakkumanan, P and Liebmann, L and Marculescu, D and Tamarapalli, N
45th ACM/IEEE Design Automation Conference (DAC08), Anaheim, CA, 2008

Analysis of systematic variation and impact on circuit performance
Banerjee, Shayak and Elakkumanan, Praveen and Chidambarrao, Dureseti and Culp, James and Orshansky, Michael
SPIE Advanced Lithography, pp. 69250K--69250K, 2008
Abstract


2007

Technology-Model-Product Parallel Design for High Performance and Rapid Time to Market 65nm Technology-Generation Microprocessors
Logan, LR and Greene, BJ and McStay, K and Liang, Q and Na, M-H and Nowak, E and Ku, S-H and Friedrich, J and Clougherty, F and Dufrene, B and others
2007 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 218--222
Abstract

(110) channel, SiON gate-dielectric PMOS with record high I on= 1 mA/$mu$m through channel stress and source drain external resistance (R ext) engineering
Yang, B and Waite, A and Yin, H and Yu, J and Black, L and Chidambarrao, D and Domenicucci, A and Wang, X and Ku, SH and Wang, Y and others
2007 IEEE International Electron Devices Meeting

Stress dependence and poly-pitch scaling characteristics of (110) PMOS drive current
Yang, B and Nummy, K and Waite, A and Black, L and Gossmann, H and Yin, H and Liu, Y and Kim, B and Narasimha, S and Fisher, P and others
2007 IEEE Symposium on VLSI Technology, pp. 126--127
Abstract

Lithography simulation in DfM: achievable accuracy versus requirements
Mansfield, Scott and Graur, Ioana and Han, Geng and Meiring, Jason and Liebmann, Lars and Chidambarrao, Dureseti
Advanced Lithography, pp. 652106--652106, 2007
Abstract


2006

LETTERS-Silicon and Elemental Semiconductor Devices-Effect of Tensile Uniaxial Stress on the Electron Transport Properties of Deeply Scaled FD-SOI n-Type MOSFETs
Nayfeh, HM and Singh, DV and Hergenrother, JM and Sleight, JW and Ren, Z and Dokumaci, O and Black, L and Chidambarrao, D and Venigalla, R and Pan, J and others
IEEE Electron Device Letters 27(4), 288--290, New York: Institute of Electrical and Electronics Engineers, c1979 [ie c1980]-, 2006

Compact model methodology for dual-stress nitride liner films in a 90nm SOI ULSI technology
Williams, RQ and Chidambarrao, D and McCullen, JH and Narasimha, S and Mitchell, TG and Onsongo, D
NSTI Nanotech, pp. 858--859, 2006
Abstract

Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
Nayfeh, HM and Singh, DV and Hergenrother, JM and Sleight, JW and Ren, Z and Dokumaci, O and Black, L and Chidambarrao, D and Venigalla, R and Pan, J and others
IEEE electron device letters 27(4), 288--290, IEEE, 2006
Abstract

Stress proximity technique for performance improvement with dual stress liner at 45nm technology and beyond
Chen, X and Fang, S and Gao, W and Dyer, T and Teh, Y and Tan, S and Ko, Y and Baiocco, C and Ajmera, A and Park, J and others
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., pp. 60--61
Abstract

Stress and Strain Measurements in Semiconductor Device Channel Areas by Convergent Beam Electron Diffraction
Li, Jinghong and Domenicucci, Anthony and Chidambarrao, Dureseti and Greene, Brian and Rovdedo, Nivo and Holt, Judson and Dunn, Drerren and Ng, Hung
MRS Proceedings, pp. 0913--D05, 2006
Abstract

300GHz Transistor Performance in Production CMOS Technologies
Jagannathan, Basanth and Chidambarrao, Dureseti and Pekarik, John
2006 64th Device Research Conference, pp. 199--200
Abstract

Design and fabrication of MOSFETs with a reverse embedded SiGe (Rev. e-SiGe) structure
Donaton, Ricardo A and Chidambarrao, Dureseti and Johnson, Jeff and Chang, Paul and Liu, Yaocheng and Henson, W Kirklen and Holt, Judson and Li, Xi and Li, Jinghong and Domenicucci, Anthony and others
2006 International Electron Devices Meeting
Abstract


2005

JA $ au$tt, M. Ieong and W. Haensch;―Stress memorization in highperformance FDSOI devices with ultra-thin silicon channels and $eta$$eta$nm gate lengths‖
Singh, DV and Sleight, JW and Hergenrother, JM and Ren, Z and Jenkins, KA and Dokumaci, O and Black, L and Chang, JB and Nakayama, H and Chidambarrao, D and others
International Electron Devices Meeting (IEDM), pp. 505--508, 2005

Effect of contact liner stress in high-performance FDSOI devices with ultra-thin silicon channels and 30 nm gate lengths
Singh, DV and Hergenrother, JM and Sleight, JW and Ren, Z and Nayfeh, H and Dokumaci, O and Black, L and Chidambarrao, D and Venigalla, R and Pan, J and others
2005 IEEE International SOI Conference Proceedings, pp. 178--179
Abstract

Dislocation modeling for the microelectronics industry
Schwarz, KW and Chidambarrao, D
Materials Science and Engineering: A400, 435--438, Elsevier, 2005
Abstract

Controlled nucleation of dislocations by a spatially localized stress field
Kammler, M and Chidambarrao, D and Schwarz, KW and Black, CT and Ross, FM
Applied Physics Letters 87(13), 133116, AIP Publishing, 2005
Abstract

Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
Singh, DV and Sleight, JW and Hergenrother, JM and Ren, Z and Jenkins, KA and Dokumaci, O and Black, L and Chang, JB and Nakayama, H and Chidambarrao, D and others
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., pp. 505--508
Abstract

Design of high performance PFETs with strained si channel and laser anneal
Luo, Z and Chong, YF and Kim, J and Rovedo, N and Greene, B and Panda, S and Sato, T and Holt, J and Chidambarrao, D and Li, J and others
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., pp. 489--492
Abstract

Dual stress liner enhancement in hybrid orientation technology
Sheraw, CD and Yang, M and Fried, DM and Costrini, G and Kanarsky, T and Lee, W-H and Chan, V and Fischetti, MV and Holt, J and Black, L and others
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., pp. 12--13
Abstract

High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
Leobandung, E and Nayakama, H and Mocuta, D and Miyamoto, K and Angyal, M and Meer, HV and McStay, K and Ahsan, I and Allen, S and Azuma, A and others
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., pp. 126--127
Abstract

Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
H{"u}bler, R Stephan and Greenlaw, D and Raab, M and Kepler, N and Chen, H and Chidambarrao, D and Fried, D and Holt, J and Lee, W and Nii, H and others
2005 - academia.edu
Abstract


2004

Vertically self-aligned buried junction formation for ultrahigh-density DRAM applications
Beintner, J and Li, Y and Knorr, A and Chidambarrao, D and Voigt, P and Divakaruni, R and Pochmuller, P and Bronner, G
IEEE Electron Device Letters 25(5), 259--261, IEEE, 2004
Abstract

Advanced Metallization Conference 2003
Shaw, TM and Jimerson, D and Haders, D and Murray, CE and Grill, A and Edelstein, DC and Chidambarrao, D
Materials Research Society, 77, 2004

Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing
Yang, HS and Malik, R and Narasimha, S and Li, Y and Divakaruni, R and Agnello, P and Allen, S and Antreasyan, A and Arnold, JC and Bandy, K and others
Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International, pp. 1075--1077
Abstract


2003

20.1 Design of High Performance PFETs with Strained Si Channel and Laser Anneal
Luo, Z and Chong, YF and Kim, J and Rovedo, N and Greene, B and Panda, S and Sato, T and Holt, J and Chidambarrao, D and Li, J
INTERNATIONAL ELECTRON DEVICES MEETING, pp. 495--498, 2003

Super-halo asymmetric vertical pass transistor design for ultra-dense DRAM technologies
Chidambarrao, D and McStay, K and Weybright, M and Mandelman, J and Beintner, J and Li, Y and Crabbe, E
VLSI Technology, Systems, and Applications, 2003 International Symposium on, pp. 25--28
Abstract

Technologies for scaling vertical transistor DRAM cells to 70 nm
Divakaruni, R and Radens, C and Belyansky, M and Chudzik, M and Park, D-G and Saroop, S and Chidambarrao, D and Weybright, M and Akatsu, H and Economikos, L and others
VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on, pp. 59--60
Abstract

On the retention time distribution of dual-channel vertical DRAM technologies
Beintner, J and Li, Y and Casarotto, D and Chidambarrao, D and McStay, K and Wang, G and Hummler, K and Divakaruni, R and Bergner, W and Crabbe, E and others
VLSI Technology, Systems, and Applications, 2003 International Symposium on, pp. 243--246
Abstract

20.5 Stress Memorization in High-Performance FDSOI Devices with Ultra-Thin Silicon Channels and 25nm Gate Lengths
Singh, DV and Sleight, JW and Hergenrother, JM and Ren, Z and Jenkins, KA and Dokumaci, O and Black, L and Chang, JB and Nakayama, H and Chidambarrao, D
INTERNATIONAL ELECTRON DEVICES MEETING, pp. 511--514, 2003

Moisture and oxygen uptake in low k/copper interconnect structures
Shaw, TM and Jimerson, D and Haders, D and Murray, CE and Grill, A and Edelstein, DC and Chidambarrao, D
Advanced Metallization Conference, 2003


2002

Combined dislocation and process modeling for local oxidation of silicon structure
Chidambarrao, D and Liu, XH and Schwarz, KW
Journal of applied physics 92(10), 6278--6286, AIP Publishing, 2002
Abstract

Vertical pass transistor design for sub-100 nm DRAM technologies
McStay, K and Chidambarrao, D and Mandelman, J and Beintner, J and Tews, H and Weybright, M and Wang, G and Li, Y and Hummler, K and Divakaruni, R and others
VLSI Technology, 2002. Digest of Technical Papers. 2002 Symposium on, pp. 180--181
Abstract

The electromigration short-length effect in AlCu and Cu interconnects
Filippi, RG and Wang, P-C and Wachnik, RA and Chidambarrao, D and Korhonen, MA and Shaw, TM and Rosenberg, R and Sullivan, TD
STRESS-INDUCED PHENOMENA IN METALLIZATION: Sixth International Workshop on Stress-Induced Phenomena in Metallization, pp. 33--48, 2002
Abstract

Backside sputter depth profiling of phosphorus diffusion from a polysilicon source
Ronsheim, P and Chidambarrao, D and Jagannathan, B and Hunt, D
Journal of Vacuum Science & Technology B 20(1), 448--450, AVS: Science & Technology of Materials, Interfaces, and Processing, 2002
Abstract

The effect of current density, stripe length, stripe width, and temperature on resistance saturation during electromigration testing
Filippi, RG and Wachnik, RA and Eng, C-P and Chidambarrao, D and Wang, P-C and White, JF and Korhonen, MA and Shaw, TM and Rosenberg, R and Sullivan, TD
Journal of applied physics 91(9), 5787--5795, AIP Publishing, 2002
Abstract


2001

Dislocation modeling for the silicon world
Schwarz, KW and Liu, XH and Chidambarrao, D
Materials Science and Engineering: A309, 229--232, Elsevier, 2001
Abstract


2000

Effect of Nitrogen Implants on Boron Transient Enhanced Diffusion
Dokumaci, Omer and Ronsheim, Paul and Hegde, Suri and Chidambarrao, Dureseti and Shaik-Adam, Lahir and Law, Mark E
MRS Proceedings, pp. B5--9, 2000
Abstract


1999

Dislocation dynamics near film edges and corners in silicon
Schwarz, KW and Chidambarrao, D
Journal of applied physics 85(10), 7198--7208, AIP Publishing, 1999
Abstract

Effects of stress concentration on metal voiding during dielectric deposition
Naeem, Munir D and Flaitz, Philip L and Chidambarrao, Dureseti
Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT, pp. 270--275
Abstract

Nitrogen implantation and diffusion in silicon
Adam, Lahir Shaik and Law, Mark E and Dokumaci, Omer and Haddara, Yaser and Murthy, Cheruvu and Park, Heemyong and Hegde, Suri and Chidambarrao, Dureseti and Mollis, Steve and Domenicucci, Tony and others
MRS Proceedings, pp. 277, 1999
Abstract

Mechanical stress characterization of shallow trench isolation by Kelvin probe force microscopy
Rueda, Hernan and Slinkman, James and Chidambarrao, Dureseti and Moszkowicz, Leon and Kaszuba, Phil and Law, Mark
MRS Proceedings, pp. 245, 1999
Abstract


1997

Numerical simulation of the X-ray stress analysis technique in polycrystalline materials under elastic loading
Chidambarrao, D and Song, YC and Noyan, IC
Metallurgical and Materials Transactions A 28(12), 2515--2525, Springer, 1997
Abstract


1996

Modeling electromigration in multi-level interconnects
Chidambarrao, D and Pelella, MM
American Institute of Physics Conference Series, pp. 98--116, 1996
Abstract

Modeling and calibration of TED
Morehead, F and Young, R and Chidambarrao, D and Murthy, C and Murley, P and Fischer, S
Proceedings of the Fourth International Symposium of Process Physics and Modeling in Semiconductor Technology, pp. 127, 1996
Abstract


1995

Thin-film temperature rise estimates during low energy ion bombardment in a plasma reactor
Naeem, MD and Chidambarrao, D
Applied physics letters 66(19), 2472--2474, AIP Publishing, 1995
Abstract


1994

Materials Reliability in Microelectronics IV, edited by P
Chidambarrao, D and Rodbell, KP and Thouless, MD and DeHaven, PW
Borgesen, JC Coburn, JE Sanchez, Jr., KP Rodbell, and WF Filter (Materials Research Society, Pittsburgh, 1994)338, 261

Line-width dependence of stress in passivated Al lines during thermal cycling
Chidambarrao, D and Rodbell, KP and Thouless, MD and DeHaven, PW
MATERIALS RESEARCH SOCIETY SYMPOSIUM PROCEEDINGS, pp. 261--261, 1994


1993

Strain effects on device characteristics: implementation in drift-diffusion simulators
Egley, JL and Chidambarrao, D
Solid-State Electronics 36(12), 1653--1664, Elsevier, 1993
Abstract


1992

CONDENSED MATTER: STRUCTURE, MECHANICAL AND THERMAL PROPERTIES 764
Komiyama, H and Yuyama, Y and Sugawara, K and Olivier, J and Bartenlian, B and Charasse, R Bisaro and Wyczisk, F and Chazelas, J and Hirtz, JP and Kramer, K-Josef and others
Applied Physics Letters 61(7), 1992
Abstract

Effect of crystallographic alignment of isolation trenches: A resolved-shear-stress perspective
Hu, SM and Chidambarrao, D
Applied physics letters 61(7), 783--785, AIP Publishing, 1992
Abstract


1991

MISFIT DISLOCATION ANALYSIS OF SEMICONDUCTOR HETEROEPITAXIAL STRUCTURES
CHIDAMBARRAO, D and CUNNINGHAM, B and MURTHY, CS and SRINIVASAN, GR
Proceedings of the Second International Symposium on Process Physics and Modeling in Semiconductor Technology, pp. 451, 1991

Novel: A nonlinear viscoelastic model for thermal oxidation of silicon
Peng, JP and Chidambarrao, D and Srinivasan, GR
COMPEL-The international journal for computation and mathematics in electrical and electronic engineering 10(4), 341--353, MCB UP Ltd, 1991
Abstract

Stresses in silicon substrates near isolation trenches
Chidambarrao, D and Peng, JP and Srinivasan, GR
Journal of applied physics 70(9), 4816--4822, AIP Publishing, 1991
Abstract


1990

Effects of Peierls barrier and epithreading dislocation orientation on the critical thickness in heteroepitaxial structures
Chidambarrao, D and Srinivasan, GR and Cunningham, B and Murthy, CS
Applied Physics Letters 57(10), 1001--1003, AIP Publishing, 1990
Abstract


1988

Comparative analyses and assessment of different hardening rules in channel die compression of fcc crystals
Chidambarrao, Dureseti
1988

Finite deformation analysis of fcc crystals in (110)(11̄2̄)(1̄11̄) channel die compression
Chidambarrao, D and Havner, KS
International journal of plasticity 4(1), 1--27, Elsevier, 1988
Abstract

On finite deformation of fcc crystals in (110) channel die compression
Chidambarrao, D and Havner, KS
Journal of the Mechanics and Physics of Solids 36(3), 285--315, Elsevier, 1988
Abstract


1987

Analysis of a family of unstable lattice orientations in (110) channel die compression
Havner, KS and Chidambarrao, D
Acta mechanica 69(1-4), 243--269, Springer, 1987
Abstract


1983

Behavior of channel-shaped reinforced concrete columns under combined biaxial bending and compression
Chidambarrao, Dureseti
1983


Year Unknown

Thouless, and PW DeHaven
Chidambarrao, KP and Rodbell, MD
Materials Reliability in Microelectronics IV, edited by P. Borgesen, JC Coburn, JE Sanchez, Jr., KP Rodbell and WF Filter (Mater. Res. Soc. Symp. Proc. 338, Pittsburgh, PA, 1994), pp. 261, 0

i988a Finite deformation analysis of fcc crystals in (110)(112)(it!) channel die compression
Chidambarrao, D and Havner, KS
Int. J. Plasticity4, 1--27, 0

i988b On finite deformation of fcc crystals in (110) channel die compression
Chidambarrao, D and Havner, KS
J. Mech. Phys. Solids36, 285--315, 0