Robert R (Russ) Robison  Robert R (Russ) Robison photo       

contact information

Manager, TCAD and Emulation Group
Albany, NY
  +1dash5182927486

links

Professional Associations

Professional Associations:  IEEE   |  IEEE Electron Devices Society (EDS)


2014

Metal gate structures for CMOS transistor devices having reduced parasitic capacitance
Cai, Jin and Pei, Chengwen and Robison, Robert R and Wang, Ping-Chuan
US Patent 8,685,817
Abstract

Butted SOI junction isolation structures and devices and method of fabrication
Johnson, Jeffrey B and Narasimha, Shreesh and Nayfeh, Hasan M and Ontalus, Viorel and Robison, Robert R
US Patent 8,741,725
Abstract


2013

Structure and method for manufacturing asymmetric devices
Nayfeh, Hasan M and Bryant, Andres and Kumar, Arvind and Rovedo, Nivo and Robison, Robert
US Patent 8,482,075
Abstract

High performance low power bulk FET device and method of manufacture
Cai, Jin and Furukawa, Toshiharu and Robison, Robert R
US Patent 8,361,872
Abstract


2012

Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture
Lukaitis, Joseph M and Rankin, Jed H and Robison, Robert R and Slisher, Dustin K and Sullivan, Timothy D
US Patent 8,298,904
Abstract

Forming an extremely thin semiconductor-on-insulator (ETSOI) layer
Abadeer, Wagdi W and Chatty, Kiran V and Cummings, Jason E and Furukawa, Toshiharu and Gauthier, Robert J and Rankin Jr, Jed H and Robison, Robert R and Tonti, William R
US Patent 8,110,483
Abstract


2011

Semispherical integrated circuit structures
Cheng, Kangguo and Furukawa, Toshiharu and Robison, Robert R and Tonti, William R and Williams, Richard Q
US Patent 7,986,022
Abstract

Semiconductor structure incorporating multiple nitride layers to improve thermal dissipation away from a device and a method of forming the structure
Anderson, Brent A and Lukaitis, Joseph M and Rankin, Jed H and Robison, Robert R
US Patent 8,053,870
Abstract

Field effect structure including carbon alloyed channel region and source/drain region not carbon alloyed
Clark Jr, William F and Gebgreselasie, Ephrem G and Liu, Xuefeng and Robison, Robert Russell
US Patent 8,017,489
Abstract


2010

Device structures for active devices fabricated using a semiconductor-on-insulator substrate and design structures for a radiofrequency integrated circuit
Abadeer, Wagdi W and Chatty, Kiran V and Gauthier, Robert J and Rankin, Jed H and Robison, Robert R and Tonti, William R
US Patent 7,709,926
Abstract

SOI transistor with merged lateral bipolar transistor
Cai, Jin and Johnson, Jeffrey B and Ning, Tak H and Robison, Robert R
US Patent 7,808,039
Abstract

Enhanced stress-retention silicon-on-insulator devices and methods of fabricating enhanced stress retention silicon-on-insulator devices
Chatty, Kiran V and Gauthier Jr, Robert J and Rankin, Jed Hickory and Robison, Robert R and Tonti, William Robert
US Patent 7,737,498
Abstract


2009

Stress Memorization Technique Using Silicon Spacer
Butt, Shahid A and Ontalus, Viorel and Robison, Robert R
US Patent App. 12/608,107
Abstract