Rashed Z. Bhatti  Rashed Z. Bhatti photo       

contact information

Senior Computer Engineer: Big Data Hardware Acceleration
Almaden Research Center, San Jose, CA, USA
  +1dash408dash927dash1661

links



2007

Standard Cell based Pseudo-Random Clock Generator for Statistical Random Sampling of Digital VLSI Signals
Rashed Zafar Bhatti, K. Chugg, Jeff Draper
50th IEEE International Midwest Symposium on Circuits and Systems, 2007

Data Strobe Timing of DDR2 using a Statistical Random Sampling Technique
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
50th IEEE International Midwest Symposium on Circuits and Systems, 2007


2006

PBuf: An On-Chip Packet Transfer Engine for MONARCH Chip
Rashed Zafar Bhatti, Craig Steele, Jeff Draper
Proceedings of the 49th IEEE International Midwest Symposium on Circuits and Systems, 2006

Analysis of Soft Error Mitigation Techniques for Register Files in IBM Cu-08 90nm Technology
Riaz Naseer, Rashed Zafar Bhatti, Jeff Draper
Proceedings of the 49th IEEE International Midwest Symposium on Circuits and Systems, 2006

Phase Measurement and Adjustment of Digital Signals Using Random Sampling Technique
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
Proceedings of the IEEE International Symposium on Circuits and Systems, 2006


2005

Duty Cycle Measurement and Correction Using a Random Sampling Technique
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
Proceedings of the 48th IEEE International Midwest Symposium on Circuits and Systems, 2005

Controlling Leakage Power with the Replacement Policy in Slumberous Caches
Nasir Mohyuddin, Rashed Bhatti and Michel Dubois
Proceedings of the Second Conference on Computing Frontiers, 2005