Bodhisatwa (Bodhi) Sadhu  Bodhisatwa (Bodhi) Sadhu photo       

contact information

RF circuits research
Thomas J. Watson Research Center, Yorktown Heights, NY USA

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Professional Associations

Professional Associations:  IEEE Member  |  IEEE Microwave Theory and Techniques Society   |  IEEE Solid State Circuits Society


2017

Introduction to the Special Section on the 2016 IEEE BCTM and IEEE CSICS
Bodhisatwa Sadhu, Sorin P Voinigescu
IEEE Journal of Solid-State Circuits, IEEE, 2017

A 28GHz 32-Element Phased Array Transceiver IC with Concurrent Dual Polarized Beams and 1.4 Degree Beam Steering Resolution for 5G Communication
Bodhisatwa Sadhu, Yahya Tousi, Joakim Hallin, Stefan Sahl, Scott Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Hakan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg
International Solid State Circuits Conference, IEEE, 2017


2016

A 60GHz packaged switched beam 32nm CMOS TRX with broad spatial coverage, 17.1 dBm peak EIRP, 6.1 dB NF at< 250mW
B Sadhu, A Valdes-Garcia, J-O Plouchart, H Ainspan, AK Gupta, M Ferriss, M Yeck, M Sanduleanu, X Gu, C Baks, others
2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 342--343

A 28GHz SiGe BiCMOS phase invariant VGA
B Sadhu, JF Bulzacchelli, A Valdes-Garcia
2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 150--153

A 12-to-26GHz fractional-N PLL with dual continuous tuning LC-D/VCOs
Mark Ferriss, Bodhisatwa Sadhu, Alexander Rylyakov, Herschel Ainspan, Daniel Friedman
2016 IEEE International Solid-State Circuits Conference (ISSCC), pp. 196--198


2015

Analog Signal Processing for Reconfigurable Receiver Front Ends
Woogeun Rhee, Bodhisatwa Sadhu, Ramesh Harjani
Wireless Transceiver Circuits: System Perspectives and Design Aspects, pp. 117--146, CRC Press, 2015

A 3-band switched-inductor LC VCO and differential current re-use doubler achieving 0.7-to-11.6 GHz tuning range
Bodhisatwa Sadhu, Sachin Kalia, Ramesh Harjani
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE, pp. 191--194

A capacitance boosted full-octave LC VCO based 0.7 to 24 GHz fractional-N synthesizer
Bodhisatwa Sadhu, Mark Ferriss, Daniel Friedman
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE, pp. 111--114

A 18mW, 3.3 dB NF, 60GHz LNA in 32nm SOI CMOS technology with autonomic NF calibration
J-O Plouchart, F Wang, A Balteanu, B Parker, MAT Sanduleanu, M Yeck, VH-C Chen, W Woods, B Sadhu, A Valdes-Garcia, others
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE, pp. 319--322

1A 13.1-to-28GHz fractional-N PLL in 32nm SOI CMOS with a Delta-Sigma noise-cancellation scheme
Mark Ferriss, Bodhisatwa Sadhu, Alexander Rylyakov, Herschel Ainspan, Daniel Friedman
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of Technical Papers, pp. 1--3

A multilayer organic package with four integrated 60GHz antennas enabling broadside and end-fire radiation for portable communication devices
Xiaoxiong Gu, Duixian Liu, Christian Baks, Bodhisatwa Sadhu, Alberto Valdes-Garcia
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), pp. 1005--1009

W-Band Dual-Polarization Phased-Array Transceiver Front-End in SiGe BiCMOS
Arun Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Scott K Reynolds, Benjamin D Parker
IEEE, 2015

A 52 GHz Frequency Synthesizer Featuring a 2nd Harmonic Extraction Technique That Preserves VCO Performance
Bodhisatwa Sadhu, Mark Ferriss, Alberto Valdes-Garcia
IEEE Journal of Solid-State Circuits 50(5), 1214--1223, IEEE, 2015

W-band scalable phased arrays for imaging and communications
Xiaoxiong Gu, Alberto Valdes-Garcia, Arun Natarajan, Bodhisatwa Sadhu, Duixian Liu, Scott K Reynolds
IEEE Communications Magazine 53(4), 196--204, IEEE, 2015

A 13.1-to-28GHz fractional-N PLL in 32nm SOI CMOS with a Delta-Sigma noise-cancellation scheme
Mark Ferriss, Bodhisatwa Sadhu, Alexander Rylyakov, Herschel Ainspan, Daniel Friedman
Solid-State Circuits Conference-(ISSCC), 2015 IEEE International, pp. 1--3


2014

Adaptive Circuit Design Methodology and Test Applied to Millimeter-Wave Circuits.
Jean-Olivier Plouchart, Fa Wang, Xin Li, Benjamin D Parker, Mihai AT Sanduleanu, Andreea Balteanu, Bodhisatwa Sadhu, Alberto Valdes-Garcia, Daniel J Friedman
IEEE Design \& Test 31(6), 8--18, 2014

Adaptive circuit design methodology and test applied to millimeter-wave circuits
J-O Plouchart, Benjamin Parker, Bodhisatwa Sadhu, Alberto Valdes-Garcia, Daniel Friedman, M Sanduleanu, Fa Wang, Xin Li, Andreea Balteanu
Design \& Test, IEEE 31(6), 8--18, IEEE, 2014

Device and circuit performance of SiGe HBTs in 130nm BiCMOS process with f T/f MAX of 250/330GHz
Vibhor Jain, T Kessler, BJ Gross, JJ Pekarik, P Candra, PB Gray, B Sadhu, A Valdes-Garcia, P Cheng, RA Camillo-Castillo, others
2014 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), pp. 96--99

Hot Chips and Cold Drinks - Industry Showcase
Zhiwei Xu, Deborah Winklea, Thomas C Oh, Samuel Kim, Steven TW Chen, Yakov Royter, Maggy Lau, Irma Valles, Donald A Hitko, James C Li, others
IEEE Radio Frequency Integrated Circuits, 2014

A 90nm SiGe BiCMOS technology for mm-wave and high-performance analog applications
John J Pekarik, J Adkisson, P Gray, Q Liu, R Camillo-Castillo, M Khater, V Jain, B Zetterlund, A DiVergilio, X Tian, others
2014 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), pp. 92--95

Wideband Voltage Controlled Oscillator
Bodhisatwa Sadhu, Ramesh Harjani
Cognitive Radio Receiver Front-Ends, pp. 21--35, Springer New York, 2014

Indirect performance sensing for on-chip self-healing of analog and RF circuits
Shupeng Sun, Fa Wang, Soner Yaldiz, Xin Li, Lawrence Pileggi, Arun Natarajan, Mark Ferriss, Jean-Olivier Plouchart, Bodhisatwa Sadhu, Ben Parker, others
IEEE Transactions on Circuits and Systems I: Regular Papers 61(8), 2243--2252, IEEE, 2014

A 46.4--58.1 GHz frequency synthesizer featuring a 2nd harmonic extraction technique that preserves VCO performance
Bodhisatwa Sadhu, Mark Ferriss, Alberto Valdes-Garcia
2014 IEEE Radio Frequency Integrated Circuits Symposium, pp. 173--176

Cognitive Radio Architectures
Bodhisatwa Sadhu, Ramesh Harjani
Cognitive Radio Receiver Front-Ends, pp. 7--19, Springer New York, 2014

CRAFT: Charge Re-use Analog Fourier Transform
Bodhisatwa Sadhu, Ramesh Harjani
Cognitive Radio Receiver Front-Ends, pp. 43--64, Springer New York, 2014

RF Sampling and Signal Processing
Bodhisatwa Sadhu, Ramesh Harjani
Cognitive Radio Receiver Front-Ends, pp. 37--42, Springer New York, 2014

Passive Switched Capacitor RF Front Ends for Spectrum Sensing in Cognitive Radios
Bodhisatwa Sadhu, Martin Sturm, Brian M Sadler, Ramesh Harjani
International Journal of Antennas and Propagation2014, Hindawi Publishing Corporation

Building an on-chip spectrum sensor for cognitive radios
Bodhisatwa Sadhu, Martin Sturm, Brian M Sadler, Ramesh Harjani
IEEE Communications Magazine 52(4), 92--100, IEEE, 2014


2013

Comments and Corrections
Bodhisatwa Sadhu, Mark A Ferriss, Arun S Natarajan, Soner Yaldiz, Jean-Olivier Plouchart, Alexander V Rylyakov, Alberto Valdes-Garcia, Benjamin D Parker, Aydin Babakhani, Scott Reynolds, others
IEEE JOURNAL OF SOLID-STATE CIRCUITS 48(6), 1539, 2013

RMO2C-5
JO Plouchart, Mark Ferriss, Bodhisatwa Sadhu, Mihai Sanduleanu, Benjamin Parker, Scott Reynolds
2013

Cognitive radio receiver front-ends: RF/analog circuit techniques
Bodhisatwa Sadhu, Ramesh Harjani
Springer Science \& Business Media, 2013

Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion
Shupeng Sun, Fa Wang, Soner Yaldiz, Xin Li, L Pileggi, A Natarajan, M Ferriss, J Plouchart, Bodhisatwa Sadhu, B Parker, others
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, pp. 1--4

A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS
J.-O. Plouchart, M. Ferriss, A.S. Natarajan, A. Valdes-Garcia, B. Sadhu, A. Rylyakov, B.D. Parker, M. Beakes, A. Babakhani, S. Yaldiz, others
IEEE Transactions on Circuits and Systems I 60(8), 2009--2017, IEEE, 2013

Enhanced multilayer organic packages with embedded phased-array antennas for 60-GHz wireless communications
Xiaoxiong Gu, Dong Gun Kam, Duixian Liu, Maxim Piz, Alberto Valdes-Garcia, Arun Natarajan, Christian Baks, Bodhisatwa Sadhu, Scott K Reynolds
2013 IEEE 63rd Electronic Components and Technology Conference, pp. 1650--1655

A 73.9--83.5 GHz synthesizer with- 111dBc/Hz phase noise at 10MHz offset in a 130nm SiGe BiCMOS technology
J-O Plouchart, Mark Ferriss, Bodhisatwa Sadhu, Mihai Sanduleanu, Benjamin Parker, Scott Reynolds
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

A fully-integrated dual-polarization 16-element W-band phased-array transceiver in SiGe BiCMOS
Alberto Valdes-Garcia, Arun Natarajan, Duixian Liu, Mihai Sanduleanu, Xiaoxiong Gu, Mark Ferriss, Ben Parker, Christian Baks, Jean-Olivier Plouchart, Herschel Ainspan, others
2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 375--378

Multi-beam spatio-spectral beamforming receiver for wideband phased arrays
Sachin Kalia, Satwik A Patnaik, Bodhisatwa Sadhu, Martin Sturm, Mohammad Elbadry, Ramesh Harjani
IEEE Transactions on Circuits and Systems I: Regular Papers 60(8), 2018--2029, IEEE, 2013

Correction to “A Linearized, Low Phase Noise VCO Based 25 GHz PLL With Autonomic Biasing”
Bodhisatwa Sadhu, Mark A Ferriss, Arun S Natarajan, Soner Yaldiz, J-O Plouchart, Alexander V Rylyakov, Alberto Valdes-Garcia, Benjamin D Parker, Aydin Babakhani, Scott Reynolds, others
Solid-State Circuits, IEEE Journal of 48(6), 1539--1539, IEEE, 2013

Analysis and design of a 5 GS/s analog charge-domain FFT for an SDR front-end in 65 nm CMOS
Bodhisatwa Sadhu, Martin Sturm, Brian M Sadler, Ramesh Harjani
IEEE Journal of Solid-State Circuits 48(5), 1199--1211, IEEE, 2013

Dual-Channel Injection-Locked Quadrature LO Generation for a 4-GHz Instantaneous Bandwidth Receiver at 21-GHz Center Frequency
Mohammad Elbadry, Bodhisatwa Sadhu, Joe Qiu, Ramesh Harjani
Microwave Theory and Techniques, IEEE Transactions on, 61(3), 1186--1199, IEEE, 2013

A Linearized, Low-Phase-Noise VCO-Based 25-GHz PLL With Autonomic Biasing
Bodhisatwa Sadhu, MarkA Ferriss, ArunS Natarajan, Soner Yaldiz, J-O Plouchart, Alexander V Rylyakov, Alberto Valdes-Garcia, BenjaminD Parker, Aydin Babakhani, Scott Reynolds, others
IEEE, 2013

An integral path self-calibration scheme for a dual-loop PLL
Mark Ferriss, Jean-Olivier Plouchart, Arun Natarajan, Alexander Rylyakov, Ben Parker, Jos\'e A Tierno, Aydin Babakhani, Soner Yaldiz, Alberto Valdes-Garcia, Bodhisatwa Sadhu, others
IEEE Journal of Solid-State Circuits 48(4), 996--1008, IEEE, 2013


2012

Low-Phase-Noise VCO-Based 25-GHz PLL with Autonomic Biasing
Bodhisatwa Sadhu, Mark A Ferriss, Arun S Natarajan, Soner Yaldiz, Jean-olivier Plouchart, others
Carnegie Mellon University, 2012

Circuit techniques for cognitive radio receiver front-ends
Bodhisatwa Sadhu
Ph.D. Thesis, 2012

A 23.5 GHz PLL with an adaptively biased VCO in 32nm SOI-CMOS
J-O Plouchart, M Ferriss, A Natarajan, A Valdes-Garcia, B Sadhu, A Rylyakov, B Parker, M Beakes, A Babakani, S Yaldiz, others
Custom Integrated Circuits Conference (CICC), 2012 IEEE, pp. 1--4

An 8GHz multi-beam spatio-spectral beamforming receiver using an all-passive discrete time analog baseband in 65nm CMOS
Satwik Patnaik, Sachin Kalia, Bodhisatwa Sadhu, Martin Sturm, Mohammad Elbadry, Ramesh Harjani
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, pp. 1--4

A 21.8--27.5 GHz PLL in 32nm SOI using Gm linearization to achieve- 130dBc/Hz phase noise at 10MHz offset from a 22GHz carrier
Bodhisatwa Sadhu, Mark A Ferriss, Jean-Olivier Plouchart, Arun S Natarajan, Alexander V Rylyakov, Alberto Valdes-Garcia, Benjamin D Parker, Scott Reynolds, Aydin Babakhani, Soner Yaldiz, others
2012 IEEE Radio Frequency Integrated Circuits Symposium, pp. 75--78

Dual channel injection-locked quadrature LO generation for a 4GHz instantaneous bandwidth receiver at 21GHz center frequency
Mohammad Elbadry, Bodhisatwa Sadhu, Joe Qiu, Ramesh Harjani
Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE, pp. 333--336

An integral path self-calibration scheme for a 20.1--26.7 GHz dual-loop PLL in 32nm SOI CMOS
Mark Ferriss, Jean-Olivier Plouchart, Arun Natarajan, Alexander Rylyakov, Benjamin Parker, Aydin Babakhani, Soner Yaldiz, Bodhisatwa Sadhu, Alberto Valdes-Garcia, Jos\'e Tierno, others
2012 Symposium on VLSI Circuits (VLSIC), pp. 176--177

A 5GS/s 12.2 pJ/conv. analog charge-domain FFT for a software defined radio receiver front-end in 65nm CMOS
Bodhisatwa Sadhu, Martin Sturm, Brian M Sadler, Ramesh Harjani
2012 IEEE Radio Frequency Integrated Circuits Symposium, pp. 39--42


2011

Design of High-Performance Survival Radios using Discrete Time Analog Signal Processing
Ramesh Harjani
Technical Report, DTIC Document, 2011

A simple, unified phase noise model for injection-locked oscillators
Sachin Kalia, Mohammad Elbadry, Bodhisatwa Sadhu, Satwik Patnaik, Joe Qiu, Ramesh Harjani
2011 IEEE Radio Frequency Integrated Circuits Symposium, pp. 1--4


2010

Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1 GHz (157\%)
Bodhisatwa Sadhu, Ramesh Harjani
Proceedings of 2010 IEEE International Symposium on Circuits and Systems, pp. 1975--1978


2009

A CMOS 3.3-8.4 GHz wide tuning range, low phase noise LC VCO
Bodhisatwa Sadhu, Jaehyup Kim, Ramesh Harjani
2009 IEEE Custom Integrated Circuits Conference, pp. 559--562


2008

Modeling and synthesis of wide-band switched-resonators for VCOs
Bodhisatwa Sadhu, Umaikhe E Omole, Ramesh Harjani
2008 IEEE Custom Integrated Circuits Conference, pp. 225--228


Year Unknown

Hot Chips and Cold Drinks Industry Showcase
Zhiwei Xu, Deborah Winklea, Thomas C Oh, Samuel Kim, Steven TW Chen, Yakov Royter, Maggy Lau, Irma Valles, Donald A Hitko, James C Li, others
IEEE RFIC, 0

Wireless Transceiver Circuits System Perspectives and Design Aspects
Ahmad Mirzaei, Hooman Darabi, Sven Mattisson, Ranjit Gharpurey, Bodhisatwa Sadhu, Ramesh Harjani, Jussi Ryyn\"anen, Kimmo Koli, Kim \"Ostman, Mikko Englund, others
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