Solomon Assefa  Solomon Assefa photo       

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Director
IBM Research - Africa

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2014

Photonic modulator with a semiconductor contact
Solomon Assefa, William MJ Green, Marwan H Khater, Yurii A Vlasov
US Patent 8,637,335

STRESS ENGINEERED MULTI-LAYERS FOR INTEGRATION OF CMOS AND Si NANOPHOTONICS
Solomon Assefa, Tymon Barwicz, Swetha Kamlapurkar, Marwan H Khater, Steven M Shank, Yurii A Vlasov
US Patent App. 14/246,546

BUTT-COUPLED BURIED WAVEGUIDE PHOTODETECTOR
Solomon Assefa, William M Green, Steven M Shank, Yurii A Vlasov
US Patent 20,140,312,443

Photonics device and CMOS device having a common gate
Solomon Assefa, William MJ Green, Steven M Shank, Yurii A Vlasov
US Patent 8,796,747


2013


Single-fiber noncritical-alignment wafer-scale optical testing
Solomon Assefa, Douglas M Gill, Jessie C Rosenberg
US Patent App. 13/971,455


2012



Exciting a selected mode in an optical waveguide
Solomon Assefa, Huapu Pan, Yurii Vlasov
US Patent App. 13/490,043

Process for selectively patterning a magnetic film structure
D.W. Abraham, S. Assefa, E.J. O'sullivan
US Patent App. 13/350,174

PILLAR-BASED INTERCONNECTS FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY
Solomon Assefa, Michael C Gaidis, Eric A Joseph, Eugene J O'sullivan
US Patent 20,120,299,136


2011

Methods for fabricating contacts to pillar structures in integrated circuits
S. Assefa, G. Costrini, C.V. Jahnes, M.J. Rooks, J.Z. Sun, others
US Patent 8,008,095


2010

Method of forming vertical contacts in integrated circuits
Solomon Assefa, Michael C Gaidis, John P Hummel, Sivananda K Kanakasabapathy
US Patent 7,803,639



2009


Systems involving spin-transfer magnetic random access memory
S. Assefa, W.J. Gallagher, C.H. Lam, J.Z. Sun
US Patent 7,505,308

Methods involving resetting spin-torque magnetic random access memory
S. Assefa, W.J. Gallagher, C.H. Lam, J.Z. Sun
US Patent 7,492,631


2008

LOW-LOSS LOW-CROSSTALK INTEGRATED DIGITAL OPTICAL SWITCH
S. Assefa, W.M. Green, Y. Kim, J. Van Campenhout, Y. Vlasov
US Patent App. 12/265,938

Method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices
Solomon Assefa, Michael C Gaidis, Eric A Joseph, Stuart Stephen Papworth Parkin, Christy S Tyberg
WO Patent App. PCT/US2008/073,066

Utilizing Sidewall Spacer Features to Form Magnetic Tunnel Junctions in an Integrated Circuit
Solomon Assefa, Michael C Gaidis, Sivananda Kanakasabapathy, John P Hummel, David W Abraham
US Patent App. 12/120,915


2007