Pouya Hashemi  Pouya Hashemi photo       

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Research Staff Member, Master Inventor, Exploratory Logic and Memory Devices
Thomas J. Watson Research Center, Yorktown Heights, NY USA


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Ph.D. (Electrical Engineering and Computer Science, IV: Engineering Physics (former Material and Devices)) Massachusetts Institute of Technology (MIT), Cambridge, MA, USA, Sep. 2005- to Aug. 2010
Research Advisor: Prof. Judy L. Hoyt
GPA: 5.0 out of 5.0
Thesis: Gate-All-Around Silicon Nanowire MOSFETs: Top-down Fabrication and Transport Enhancement Techniques
Major Courses: Sub-micrometer and Nanometer Technology (H.I Smith, K. Berggren and G. Barbastasis), Physics for Solid-State Applications (T.P. Orlando), Physics of Micro-fabrication: Front End Processing (J.L. Hoyt), Integrated Microelectronic Devices (C.S. Sodini).
Minor: Applied Mathematics: Computational Science and Engineering and Numerical Analysis

M.Sc. (Electrical Engineering, Microelectronics)
University of Tehran, Tehran, IRAN, Fall 2003- Aug 2005
Graduated with GPA: 19.9 out of 20
-Ranked first among of all the students in University of Tehran.
Thesis: Effects of Hydrogenation and Stress on the morphology and crystallinity of nano-crystalline Si and Ge and applications in low temperature thin film transistors
Graduate Courses: Theory and the technology of fabrication (I) and (II), Semiconductor sensors, Advanced semiconductor devices, Design of the linear Integrated Circuits, Optoelectronics, Quantum Mechanics and Solid State Physics, Silicon On Insulator (SOI) devices and circuits

B.Sc. (Electrical Engineering-Electronics) University of Tehran, Tehran, IRAN, Fall 1999- Aug 2003
Graduated with GPA: 19.0 out of 20
-Ranked first among all of the students in University of Tehran.
Project: Low Temperature Stress-Assisted Crystallization of Amorphous Silicon on Thin Flexible Glass

High School (Mathematics and Physics) Alborz High School, Tehran, IRAN, 1995-1999
High school diploma with Cumulative GPA: 19.75 out of 20
-Ranked first among 720 classmates in high school