Tze-Chiang Chen, Suryadever Basvaiah, et al.
IEEE T-ED
An approach is described for determining the hot-electron-limited voltages for silicon MOSFET's of small dimensions. The approach was followed in determining the room-temperature and the 77 K hot-electron-limited voltages for a device designed to have a minimum channel length of 1 µm. The substrate hot-electron limits were determined empirically from measurements of the emission probabilities as a function of voltage using devices of reentrant geometry. The channel hot-electron limits were determined empirically from measurements of the injection current as a function of voltage and from long-term stress experiments. For the l µm design considered, the channel hot-electron limits are lower than the substrate hot-electron limits. The maximum voltage, VDS = VCS, is 4.75 V at room temperature (25°C) and 3.5 V at 77 K. More details of the voltage limits as well as the approach for determining them are discussed. Examples of circuits designed with these devices to operate within these hot-electron voltage limits are also discussed. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.
Tze-Chiang Chen, Suryadever Basvaiah, et al.
IEEE T-ED
Wing K. Luk, Jin Cai, et al.
VLSI Circuits 2006
Leland Chang, Robert K. Montoye, et al.
VLSI Circuits 2010
Denny Duan-Lee Tang, Tze-Chiang Chen, et al.
IEEE T-ED