Minxiang Gong, Hua Chen, et al.
IEEE JSSC
This paper introduces a single-inductor 4-phase hybrid switched-capacitor (4PSC) topology for integrated high-ratio direct down conversion suitable for point-of-load applications. The proposed topology consists of a 3-phase 4:1 switched-capacitor stage, reducing the switching node swing to 12-V (1/4 of the input) to significantly reduce switching loss, and an inductor to softly charge and discharge the flying capacitors with an extra phase (hence 4-phase operation) with controlled duty cycle to regulate the output voltage to 1V for direct-down conversion. The converter operates with a 4X effective switching frequency, which reduces the ripple/inductance required or switching frequency for better efficiency. With the same output voltage ripples as double step-down (DSD) and 3-level (3L1P) buck converters, the on-time is 4X that of DSD and 3L1P converters, which reduces the challenges in controller design. Lower-voltage (LV) transistors, such as 12-V devices, can be used in some of the switches to significantly improve efficiency. When compared to DSD and 3-Level converters that are state-of-the-art integrated topologies, with the same inductor, output capacitor, and output ripples in the same BCD process, this design achieves: 1) an efficiency comparable or higher than DSD (e.g., ∼3% higher at 48V-1V/5A); 2) along with using only one inductor instead of two for DSD, which can reduce the cost and increase the power density; and 3) much higher efficiency compared to a 3-level buck converter. The 4PSC topology is verified in simulations, showing peak efficiencies of ∼85% and ∼91% in a 180-nm BCD process with 48V-1V and 48V-2V conversions, respectively.
Minxiang Gong, Hua Chen, et al.
IEEE JSSC
Arnab Neelim Mazumder, Jian Meng, et al.
IEEE JESTCS
Todd Takken, Andrew Ferencz, et al.
VLSI Circuits 2019
Xin Zhang, Andrew Ferencz, et al.
APEC 2017