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This paper describes the importance of bipolar current gain and diode ideality factor to predictions of single-event circuit responses. It then reports on measurements of parasitic bipolar transistors in 45 nm Silicon-on-Insulator (SOI) technology, and adjustments to the simulation model to match the measurements. © 2010 IEEE.
Ruilong Xie, Pietro Montanini, et al.
IEDM 2016
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