Oliver Schilter, Alain Vaucher, et al.
Digital Discovery
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
Oliver Schilter, Alain Vaucher, et al.
Digital Discovery
Julien Autebert, Aditya Kashyap, et al.
Langmuir
Mark W. Dowley
Solid State Communications
Revanth Kodoru, Atanu Saha, et al.
arXiv