U. Wieser, U. Kunze, et al.
Physica E: Low-Dimensional Systems and Nanostructures
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
U. Wieser, U. Kunze, et al.
Physica E: Low-Dimensional Systems and Nanostructures
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009
S. Cohen, J.C. Liu, et al.
MRS Spring Meeting 1999
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990