Conference paper
Graphene nanostructures for device applications
Joerg Appenzeller, Yang Sui, et al.
VLSI Technology 2009
In this letter, we demonstrate a gate-all-around single-wall carbon nanotube field-effect transistor. This is the first successful experimental implementation of an off-chip gate and gate-dielectric assembly with subsequent deposition on a suitable substrate. The fabrication process and device measurements are discussed in the letter. We also argue in how far charges in the gate oxide are responsible for the observed nonideal device performance. © 2008 IEEE.
Joerg Appenzeller, Yang Sui, et al.
VLSI Technology 2009
Phaedon Avouris, Zhihong Chen, et al.
Nature Nanotechnology
Yu-Ming Lin, Joerg Appenzeller, et al.
IEEE Electron Device Letters
Zhihong Chen, Yu-Ming Lin, et al.
Physica E: Low-Dimensional Systems and Nanostructures