Charge trapping & NBTI in high k gate dieectric stacks
Sufi Zafar, A.C. Callegari, et al.
ECS Meeting 2005
Ultra-thin oxide reliability has become an important issue in integrated circuit scaling. Present reliability methodology stresses oxides with a low impedance voltage source. This, though, does not represent the stress under circuit configurations, in which transistors are driven by other transistors. A Current Limited Constant Voltage Stress simulates circuit stress well. Limiting the current during the breakdown event reduces the post-breakdown conduction. Limiting the current to a sufficiently low value may prevent device failure, altogether.
Sufi Zafar, A.C. Callegari, et al.
ECS Meeting 2005
V.K. Paruchuri, V. Narayanan, et al.
VLSI-TSA 2007
J.H. Stathis, M.A. Kastner
Physical Review B
M.R. Kozlowski, M. Staggs, et al.
SPIE Laser-Induced Damage in Optical Materials 1990