T.N. Jackson, S. Nelson, et al.
IEEE Transactions on Electron Devices
In this letter, we present results of enhancement and depletion mode transistors fabricated on the same layer structure of Si/SiGe, without using gate recess. The current in the enhancement mode device is controlled by a pn-junction, while that of the depletion-mode device is controlled by a Schottky barrier. A peak transconductance of 327 mS/mm and 417 mS/mm has been achieved in 0.5-μm gate length depletion and enhancement-mode transistors, respectively.
T.N. Jackson, S. Nelson, et al.
IEEE Transactions on Electron Devices
K. Ismail, F. Legoues, et al.
Applied Physics Letters
K. Rim, J.O. Chu, et al.
VLSI Technology 2002
J. Cai, P.M. Mooney, et al.
Journal of Applied Physics