Conference paperEXPERIMENTAL TECHNOLOGY AND CHARACTERIZATION OF SELF-ALIGNED 0. 1 mu M-GATE-LENGTH LOW-TEMPERATURE OPERATION NMOS DEVICES.G.A. Sai-Halasz, M.R. Wordeman, et al.IEDM 1986
Conference paperHigh-performance Si1-xGex channel on insulator trigate PFETs featuring an implant-free process and aggressively-scaled fin and gate dimensionsP. Hashemi, M. Kobayashi, et al.VLSI Circuits 2013
Conference paperCMOS technology for low voltage/low power applicationsB. Davari, R.H. Dennard, et al.CICC 1994
Conference paperHigh-performance Si1-xGex channel on insulator trigate PFETs featuring an implant-free process and aggressively-scaled fin and gate dimensionsP. Hashemi, M. Kobayashi, et al.VLSI Technology 2013