Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
A flash-memory device has been fabricated and demonstrated at room temperature by coupling a self-aligned, sub-50-nm quantum dot to the channel of a transistor on a silicon-on-insulator (SOI) substrate. Large threshold voltage shifts of up to 0.75 V are obtained for small erase/write voltages (≤3 V) at room temperature. At 90 K, evidence of single electron storage is observed. The small size of this device is attractive for achieving high packing densities, while the relatively large output current (100 nA-μA's), low off-state current (10 pA), and simple fabrication, requiring only minor variations in standard processing, make it suitable for integration with current silicon memory and logic technology.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
T.H.P. Chang, M.G.R. Thomson, et al.
SPIE Optical Science, Engineering, and Instrumentation 1995
B. Pezeshki, F. Agahi, et al.
Applied Physics Letters
C.C. Williams, W.P. Hough, et al.
Applied Physics Letters