Pier Andrea Francese, Thomas Toifl, et al.
ESSCIRC 2014
This paper presents a single-chip all-CMOS solution for 4×OC-3c, OC-12, and OC-12c synchronous digital hierarchy/synchronous optical network (SDH/SONET) framing with integrated serial line interfaces. Outstanding features of this chip are clock and data recovery and fulfillment of ITU-T and Bellcore jitter requirements for SDH/SONET systems, as well as the large range of functions offered. These functions include asynchronous transfer mode (ATM) and point-to-point protocol (PPP) support, as well as built-in native SDH/SONET functions such as digital cross-connect, add/drop multiplexing, and automatic protection switching. In addition, the chip is based on a new scalable modular architecture.
Pier Andrea Francese, Thomas Toifl, et al.
ESSCIRC 2014
Daniel M. Kuchta, Jonathan E. Proesel, et al.
OFC 2019
Christian Menolfi, Thomas Toifl, et al.
ISSCC 2011
Thomas Toifl, Christian Menolfi, et al.
VLSI Circuits 2005