Shiyan Hu, Zhuo Li, et al.
IEEE TCAS-II
Buffer insertion is essential for achieving timing closure. This work studies buffer insertion under two types of constraints: (i) avoiding blockages, and (ii) inserting buffers into pre-determined buffer bay regions. We propose a general Steiner tree routing problem to drive this application and present a maze-routing based heuristic. We show that this approach leads to useful solutions on industry designs.
Shiyan Hu, Zhuo Li, et al.
IEEE TCAS-II
C.N. Sze, Charles J. Alpert, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Charles J. Alpert, Andrew B. Kahng
Journal of Classification
He Zhou, Sunil P. Khatri, et al.
DAC 2019