Rongjian Liang, Hua Xiang, et al.
ISPD 2020
Buffer insertion is essential for achieving timing closure. This work studies buffer insertion under two types of constraints: (i) avoiding blockages, and (ii) inserting buffers into pre-determined buffer bay regions. We propose a general Steiner tree routing problem to drive this application and present a maze-routing based heuristic. We show that this approach leads to useful solutions on industry designs. © 2001 IEEE.
Rongjian Liang, Hua Xiang, et al.
ISPD 2020
Charles J. Alpert, Patrick Groeneveld
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Weiping Shi, Zhuo Li, et al.
ASP-DAC 2004
Chai Wah Wu
ISCAS 2001