Narendra Parihar, Richard G. Southwick, et al.
IRPS 2017
Hard breakdown (HBD) is shown to be a gradual process with the gate current increasing at a predictable rate exponentially dependent on the instantaneous stress voltage and oxide thickness. This is contrary to conventional wisdom that maintains that HBD is a fast thermally driven process. The HBD degradation rate (DR) for a 15 Å oxide scales from > 1 mA/s at 4 V to < 1 nA/s at 2 V, extrapolating to < 10 fA/s at use voltage. Adding the HBD evolution time to the standard time-to-breakdown potentially reduces the projected fail rate of gate dielectrics by orders of magnitude.
Narendra Parihar, Richard G. Southwick, et al.
IRPS 2017
Barry P. Linder, A. Dasgupta, et al.
IRPS 2016
Barry P. Linder, Nathan W. Cheung
Surface and Coatings Technology
Barry P. Linder, Eduard Cartier, et al.
VLSI-DAT 2013