65nm Cu integration and interconnect reliability in low stress K=2.75 SiCOHV. McGahayG. Bonillaet al.2006IITC 2006
PECVD Low-k (∼2.7) dielectric SiCOH film development and integration for 65 nm CMOS devicesK. IdaS. Nguyenet al.2005AMC 2005
Nanoporous materials integration into advanced microprocessorsE. Todd RyanCathy Labelleet al.2005MRS Spring Meeting 2005
Plasma induced dielectric modification: Etching challenges for 65nm and beyond technology nodesN. FullerM.A. Worsleyet al.2005ISTC 2005
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodesT. NogamiS. Laneet al.2005Optics East 2005
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOLW.-H. LeeA. Waiteet al.2005IEDM 2005
Ash-induced modification of porous and dense SiCOH inter-level-dielectric (ILD) materials during damascene plasma processingT. DaltonN. Fulleret al.2004IITC 2004