Schuyler Eldridge  Schuyler Eldridge photo         

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Research Staff Member
T. J. Watson Research Center, Yorktown Heights, NY USA


Professional Associations

Professional Associations:  ACM  |  IEEE

more information

More information:  GitHub  |  Personal Website  |  CV


I'm a Research Staff Member with the Reliability and Power-Aware Microarchitectures group working to dramatically improve the hardware design process.

I strive to bring new languages, compiler techniques, and tried-and-tested software engineering paradigms to the world of hardware. This involves active development of the Chisel hardware construction language, FIRRTL circuit Intermediate Representation, FIRRTL compiler, and a push to develop the Chisel/FIRRTL Hardware Compiler Framework

I am currently funded through the DARPA DSSoC project where I work to improve the System-on-Chip design process working with Luca Carloni and the SLD group at Columbia.

Some open source projects that have grown out of this work include:

I received my Ph.D in Computer Engineering from Boston University in 2016 where I developed a simultaneously multithreaded model of neural network computation using the neural network accelerator referenced above (DANA).