Barry Linder  Barry Linder photo         

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Advanced Gate Dielectrics and CMOS Reliability
Thomas J. Watson Research Center, Yorktown Heights, NY USA



Barry P. Linder received his B.S. from Pennsylvania State University in 1993, and an M.S and Ph.D. in Electrical Engineering from the University of California at Berkeley in 1999. His doctoral thesis dealt with plasma processing, plasma implantation, and plasma charging damage. Since graduation Dr. Linder has been employed as a Research Staff Member at the IBM T. J. Watson Research Center, Yorktown Heights, NY. Initially his work centered on the breakdown of ultra-thin gate oxides, including the statistics of breakdown phenomenon, post-breakdown conduction mechanisms, and the interaction between oxide breakdown and circuit operation. This work formed the basis for the paper that received an "Outstanding Paper Award" at the 2003 International Reliability Physics Symposium.

After 2003, his focus switched to electrical characterization and integration of metal gates and high-k materials. He has studied the full array of advanced gate stack materials including their integration and their effect on effective work function, channel mobility, gate leakage, and inversion layer thickness scaling. He specialized on the interaction between cap layers, interface layers, and metal gate composition on the final electrical properties of the gate stack. As manufacturing of high-k/metal gate stacks approached, he concentrated on all reliability aspects with emphasis on dielectric breakdown and bias temperature instability.

More recently, he has added focus on circuit reliability by integrating device level reliability with circuit level functionality. This work has evolved towards optimizing the trade-off of system performance with system reliability with an end goal of creating the highest performance technology while achieving the required reliability.