Hsinyu (Sidney) Tsai  Hsinyu (Sidney) Tsai photo         

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Manager, PRSM, Analog AI for Deep Learning Acceleration
Almaden Research Center, San Jose, CA, USA



HsinYu (Sidney) Tsai received her Ph.D. from the Electrical Engineering and Computer Science department at Massachusetts Institute of Technology in 2011. Her main research activities in Prof. Henry I. Smith’s group were on super-resolution optical lithography and imaging combining photo-chromic films and diffractive optics.

Sidney currently works in the Alamden Research Center in San Jose, CA, as the manager of the Analog AI group. Analog AI based on Phase Change Memory (PCM) devices utilizes emerging non-volatile memory embedded in the backend to compute vector-matrix multiplication at the location of of data, potentially achieving high power performance for deep learning workloads in the Cloud and on the edge. The group demonstrates software compatible accuracies for classic DNN datasets, such as MNIST, CIFAR-10, and CIFAR-100, in a paper published in Nature in 2018. In 2021, the IBM Analog AI teams published two highlight papers at the VLSI conference based on two inference chips with PCM devices fabricated on top of 14nm CMOS transistors. The group is now focusing on developing large scale, configurable hardware for both inference and training applications.


Sidney worked in the Nanofabrication and Electron Beam Lithography group at the IBM T.J. Watson Research Center in Yorktown Heights, N.Y, from 2011 to 2015, where she is developing next generation lithography for circuit applications with directed self-assembly (DSA). Sidney's main research activities are developing sub-30nm pitch pattern generation process and integration schemes for finFET device fabrication. More specifically, the team develops processes that utilizes the self-alignment nature of directed self-assembly (DSA) for finFET circuit patterning and characterizes devices made with such patterning schemes.

From 2015-2016, Sidney became the manager of the Advanced Lithography group in the Microelectronics Research Laboratory (MRL), managing the operation of a 200mm research prototyping line with lithography techniques ranging from i-line, DUV, 193, to e-beam lithography. The MRL enables critical hardware to advance the field of device and computing research, including III-V, carbon nanotube, photonics, and quantum computing.

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