Lawrence A. (Larry) Clevenger  Lawrence A. (Larry) Clevenger photo         

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Academy of Technology LogoSTSM BEOL Architect, Member IBM Academy of Technology, IBM Lifetime Master Inventor, IBM CSC Morocco9
Albany, NY


Professional Associations

Professional Associations:  IEEE Rebooting Computing

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More information:  IBM Academy of Technology



I am an intensely curious person who pushes the boundaries of what is possible. As a world-class inventor, I create disruptive solutions to highly technical problems. I passionately mentor others to enable them to reach their full potential. By leading cross-functional teams to achieve a higher standard, I create recognized business value and millions in revenue.. - Strengths in Innovation, Leadership, Mentoring, and Public Speaking - Comprehensive experience as Lead Interconnect Architect for IBM/Partner alliances for 5, 7, 10 and 14nm technology nodes in both IBM Research and Manufacturing/Development organizations - Lead multi-cultural technical teams that invent, implement, qualify and deliver technology to meet business objectives of multi-national semiconductor companies, currently lead technologist for nanoscale interconnect semiconductor technologies - Early adopter and advocate for innovative technologies and ideas - World-class innovation excellence: 256 issued US patents, over 110 career publications, IBM Lifetime Master Inventor, Member IBM Academy of Technology, Top prolific inventor -Pro-bono international consulting onsite in Morocco on Cognitive Agriculture through the four week IBM Corporate Service program in 2016

Current and Prior Positions

Senior Technical Staff Member - Advanced BEOL Architect, Design and Technology Definition
2011 - Present
I am an internationally recognized leader in semiconductor technology – taking new products from innovation to definition to early production. Since 2011 I have defined new semiconductor technologies for IBM as a chip hardware lead architect. My area of excellence is optimizing the on-chip interconnect from silicon devices to semiconductor packaging substrates for performance, yield, and cost.