I am a characterization engineer in the Semiconductor Materials and Process Technology Research group at IBM Research in Albany, NY. My work concentrates on Health-of-the-Line (HOL) inline testing electrical data characterization on purposely designed HOL macros to find out yield loss and relevant process issues and provide technology development directions. The characterization work also involves data mining, correlation and data partition analysis to provide deep insight of process, device and circuit features related to integration.
I received my PhD in Engineering from Osaka University, Japan and worked as a post-doctor researcher in Electrical Engineer department at University of Michigan at Ann Arbor. Later on I joined IBM Microelectronics at Burlington, Vermont site for 14 years. I have worked on RF micro & millimeter wave device development focus on SiGe Heterojunction Bipolar Transistor (HBT), high-voltage (~120V) Si CMOS, LDMOS for power management and RF passive devices integration into conventional 1.2V, 1.8V, 2.5V and 3.3V cmos technologies integration development and device characterization. I also worked on 200mm wireless application oriented low power cmos and switch technologies mass production characterization and RFCMOS switch reliability characterization focus on hot carrier degradation at radio frequency. I achieved 16th IBM invention plateau in 2016 and was grand IBM master inventor in 2013.