IBM Threadmill Post-Silicon Exerciser (Threadmill)     


IBM Threadmill Post-Silicon Exerciser (Threadmill) - overview

Post-silicon validation is used to detect bugs in hardware on the silicon itself, after manufacturing. Post-silicon validation of hardware poses unique challenges as compared with pre-silicon verification. These include lack of observability into the design, typical instability of silicon bring-up platforms and absence of supporting software (such as an operating system or debuggers). On the other hand, this stage of verification provides a very fast verification platform being the silicon itself, as opposed to pre-silicon verification that runs on a software simulator of the hardware.

These challenges, combined with the need to reach optimal utilization of the expensive, but fast silicon platforms, lead to unique considerations in designing suitable tools. The key requirements are keeping the tool simple and performing most of its operations on platform without interaction with the environment. Based on these considerations, we have developed Threadmill, an IBM post-silicon multi-threaded and multi-processor validation bring-up tool. Threadmill is a bare-metal application that once loaded to the system, continuously generates test-cases, executes them, and checks their results. Threadmill is a directable tool, controlled through test-templates that are similar to those used by IBM Genesys-Pro. Threadmill was used as part of the development of POWER7, POWER8, POWER9 and their derivatives, where it detected numerous hard-to-hit bugs. It is currently involved in the validation of the next generation processors in IBM and is also licensed to external customers developing ARM-based designs.

For details, please contact Tom Kolan.   

Threadmill architecture

Threadmill architecture