POWER7+ (TM) Microprocessor Design       

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 Alper Buyuktosunoglu photoNianzheng Cao photo Bruce M. Fleischer photo Shih-Hsien Lo photo photo Robert A. Philhower photo photo Phillip J. Restle photoChing Zhou photo Matthew M. Ziegler photo

POWER7+ (TM) Microprocessor Design - overview


The POWER7+™ microprocessor is a follow-on to POWER7™ that offers numerous performance enhancements. POWER7+™ is implemented in IBM’s 32-nm silicon-on-insulator (SOI) process In addition to enhancing the chip functionality and increasing the size of the on-chip L3 cache to 80MB, the POWER7+™ chip achieves a frequency boost of 15%-25% over its predecessor at the same power. The IBM Research team contributed to all aspects of the POWER7+™ design.

Power7+ Overview

Figure from: S. Taylor, “POWER7+™: IBM’s next generation POWER microprocessor,” Hot Chips 24, 2012.

Recent Publications:

Matthew M. Ziegler, George D. Gristede, Victor V. Zyuban, "Power Reduction by Aggressive Synthesis Design Space Exploration," to appear in Proc. of the 2013 International Symposium on Low Power Electronics and Design (ISLPED13).