Dielectric Materials Research for Advanced Microelectronic Devices - A New Integration Platform - P4
Addition of porosity has been accepted as the path to lower the dielectric constant of the BEOL insulator by the semiconductor
industry. Above certain levels of porosity, the concomitant increase in pore size distribution and pore interconnectivity lead to
enhanced integration process sensitivity. Below k=2.4, this appears in the form of severe integration issues, such as, etch profile
non-uniformity, increase in integrated k due to plasma induced damage and deterioration of electrical reliability.
P4 is the first strategy that truly takes advantage of the increasing pore size and interconnectivity when the dielectric constant is decreased below 2.4. We protect the fully cured porous ultralow-k material by filling the pores with a thermally decomposable organic polymer prior to integration, which is then removed after completion of the dual-damascene build. This results in greatly improved trench profiles and significant reduction in plasma damage.