HARSH 2013 - Invited Speakers
"Environmental Design Challenges for the MSL Curiosity Rover" (Keynote)
James A. Donaldson (Jet Propulsion Laboratory - NASA)
James Donaldson was born to medical missionary parents in India. From his early childhood he was fascinated by how things worked. This fascination quickly evolved into an interest in all things electronic and ‘space’ related. He finished High School in India before moving to the United States for college. James Donaldson received his BSEE degree in 1978 and MSEE degree in 1979 from Rensselaer Polytechnic Institute in Troy, New York.
James Donaldson has been at JPL since 1986. Since coming to JPL, he has worked on signal processing and ‘Data System’ designs for instruments and for S/C control applications. James worked as the Cognizant Engineer of the Command and Data Subsystem (CDS) on the Cassini Project (mission to Saturn). Following Cassini, Mr. Donaldson became the Avionics Subsystem Engineer for the Mars Exploration Rover (MER) Project. This involved working with the flight hardware, flight software, and GSE development teams from architectural design to an ultimately successful landing on Mars. After MER, James supported pre-project design activities; and then in 2006, he moved on to become the Avionics Chief Engineer for the Mars Science Laboratory (MSL) Project. This work continued through launch in November of 2011 until the successful landing in August 2012. The Cassini spacecraft, the MER ‘Opportunity’ Rover, and the MSL ‘Curiosity’ Rover, continue to perform their scientific activities at Saturn and at Mars respectively.
Currently James Donaldson is the Avionics Chief Engineer for the ‘Flight Electronics and Software Systems’ Section (Section 349) at JPL. He spends his free time with his family, hiking, reading, and enjoying movies.
"Extreme Scale Computer Architecture:
Energy Efficiency from the Ground Up"
Josep Torrellas (University of Illinois, Urbana-Champaign)The presentation is available.
Josep Torrellas is a Professor of Computer Science and (by courtesy) Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (UIUC). He is a Fellow of IEEE and ACM. He is the Director of the Center for Programmable Extreme-Scale Computing, a center funded by DARPA, DOE, and NSF that focuses on architectures for extreme energy and power efficiency. He also directs the Intel-Illinois Parallelism Center (I2PC), a center created by Intel to advance parallel computing in clients. He has made contributions to parallel computer architecture in the areas of shared-memory multiprocessor organizations, cache hierarchies and coherence protocols, thread-level speculation, and hardware and software reliability. He received a Ph.D. from Stanford University.
"Considering Resilience in the Design of Computing Algorithms"
Rakesh Kumar (University of Illinois, Urbana-Champaign)The presentation is available.
Rakesh Kumar is an Assistant Professor in the Electrical and Computer Engineering Department at the University of Illinois at Urbana Champaign. He received a B.Tech. degree in Computer Science and Engineering from the Indian Institute of Technology (IIT), Kharagpur in 2001 and a Ph.D. degree in Computer Engineering from the University of California, San Diego in September 2006. Prior to moving to Champaign in 2007, he was a visiting researcher with Microsoft Research at Redmond. His research interests include reliable and low power computing. His past research on heterogeneous multi-core architecture and conjoined-core architectures has directly influenced processor products and roadmaps from several companies. His current research interests are in error resilient computer systems and low power computer architectures for emerging workloads. His research has been recognized by several awards, including Best Paper Awards (CASES 2011, SRC TECHCON 2011), Best Paper Award Nominations (HPCA 2012), ARO Young Investigator Award, Arnold O Beckman Research Award, FAA Creative Research Award, UCSD CSE Best Dissertation Award, and an IBM PhD Fellowship. Other recognitions include Keynote Invitations (CASA 2012, WRA 2011, WDSN 2011, LPonTR 2011), Invited/Plenary lectures at over twenty conferences and workshops (DAC, CASES, ISLPED, IOLTS, etc.), and Invited Guest Editorships (IEEE Transactions on Multimedia, IEEE Embedded Systems Letters). He has served as a Chair of two Workshops in the area of robust computing and multi-core computing (SELSE 2011 and dasCMP 2005-2008). When not doing computing research, he enjoys studying interactions between technology, policy, and society.