Tatsushi Inagaki  Tatsushi Inagaki photo         

contact information

Staff Researcher
IBM Research - Tokyo, IBM Japan, Ltd.
  +81dash3dash3808dash5283

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More information:  GitHub


2022

Detecting Layered Bottlenecks in Microservices
Tatsushi Inagaki, Yohei Ueda, Moriyoshi Ohara, Sunyanan Choochotkaew, Marcelo Amaral, Scott Trent, Tatsuhiro Chiba, Qi Zhang
IEEE CLOUD, 2022


2021

Detection of Layered Bottlenecks in Microservices
Tatsushi Inagaki, Yohei Ueda, Moriyoshi Ohara, Tatsuhiro Chiba, Qi Zhang
135th Workshop of Information Processing Society in Japan, Special Interest Group of Programming, PRO-2021-2, 2021
(oral presentation only)


2019

Report on ACM/SPEC ICPE 2019
Tatsushi Inagaki, Kazuaki Ishizaki
Computer Software 36(3), 3_60-3_64, Japan Society for Software Science and Technology, 2019
(in Japanese)

Profile-based Detection of Layered Bottlenecks
Tatsushi Inagaki, Yohei Ueda, Takuya Nakaike, Moriyoshi Ohara
Proceedings of the 2019 ACM/SPEC International Conference on Performance Engineering, ICPE 2019, Mumbai, India, April 7-11, 2019., pp. 197--208, ACM
(best research paper runners-up)


2017

Profile-based Bottleneck Identification for Permissioned Blockchains
Tatsushi Inagaki, Yohei Ueda, Moriyoshi Ohara
116th Workshop of Information Processing Society in Japan, Special Interest Group of Programming, PRO-2017-3
(oral presentation only)


2016

Container management as emerging workload for operating systems
Tatsushi Inagaki, Yohei Ueda, Moriyoshi Ohara
2016 IEEE International Symposium on Workload Characterization, IISWC 2016, Providence, RI, USA, September 25-27, 2016, pp. 65--74


2010

Coloring-based Coalescing for Graph Coloring Register Allocation
Rei Odaira, Takuya Nakaike, Tatsushi Inagaki, Hideai Komatsu, and Toshio Nakatani
Proceedings of the 8th annual IEEE/ACM international Symposium on Code Generation and Optimization (CGO), pp. 160--169, 2010


2006

Profile-based global live-range splitting
Takuya Nakaike, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani
PLDI '06 Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation , pp. 216--227, Google Patents
US Patent 8,555,270


2004

Whole-stack analysis and optimization of commercial workloads on Server systems
C Richard Attanasio, Jong-Deok Choi, Niteesh Dubey, Kattamuri Ekanadham, Manish Gupta, Tatsushi Inagaki, Kazuaki Ishizaki, Joefon Jann, Robert D Johnson, Toshio Nakatani, others
Network and Parallel Computing, pp. 5--8, Springer, 2004

Evolution of a Java just-in-time compiler for IA-32 platforms
Toshio Suganuma, Takeshi Ogasawara, Kiyokuni Kawachiya, Mikio Takeuchi, Kazuaki Ishizaki, Akira Koseki, Tatsushi Inagaki, Toshiaki Yasue, Motohiro Kawahito, Tamiya Onodera, others
IBM Journal of Research and Development 48(5.6), 767--795, IBM, 2004


2003

Integrated prepass scheduling for a Java Just-In-Time compiler on the IA-64 architecture
Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization, pp. 159--168, 2003

Stride prefetching by dynamically inspecting objects
Tatsushi Inagaki, Tamiya Onodera, Hideaki Komatsu, Toshio Nakatani
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation , pp. 269--277

Effectiveness of cross-platform optimizations for a Java just-in-time compiler
Kazuaki Ishizaki, Mikio Takeuchi, Kiyokuni Kawachiya, Toshio Suganuma, Osamu Gohda, Tatsushi Inagaki, Akira Koseki, Kazunori Ogata, Motohiro Kawahito, Toshiaki Yasue, others
Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications, pp. 187--204, ACM, 2003


2002

Eliminating exception constraints of Java programs for IA-64
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani
Parallel Architectures and Compilation Techniques, 2002. Proceedings. 2002 International Conference on, pp. 259--268


2000

Evaluation of compiler-assisted software DSM schemes for a workstation cluster
Junpei Niwa, Tatsushi Inagaki, Takashi Matsumoto, Kei Hiraki
Innovative Architecture for Future Generation High-Performance Processors and Systems, 1999. International Workshop, pp. 57--68, 2000


1998

Supporting software distributed shared memory with an optimizing compiler
Tatsushi Inagaki, Junpei Niwa, Takashi Matsumoto, Kei Hiraki
Parallel Processing, 1998. Proceedings. 1998 International Conference on, pp. 225--235


1997

Efficient Implementation of Software Release Consistency on Asymmetric Distributed Shared Memory
Junpei Niwa, Tatsushi Inagaki, Takashi Matsumoto, Kei Hiraki
Parallel Architectures, Algorithms, and Networks, 1997.(I-SPAN'97) Proceedings., Third International Symposium on, pp. 198--201