Keiji Matsumoto  Keiji Matsumoto photo         

contact information

Research on thermal analysys and mechanical analysis of packaging
IBM Research - Tokyo, Yamato, Japan
  +81dash80dash5915dash4793

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Professional Associations

Professional Associations:  IEEE Components, Packaging and Manufacturing Technology Society


2022

Electrical charger with correction capability for wearable electrochemical sensor
Keiji Matsumoto, Takahito Watanabe, Eiji Nakamura, Patrick Ruch, Hiroyuki Mori

Abstract

A hearable (a wearable for an ear) for the early detection of heat-stroke
Keiji Matsumoto

Abstract


2019

Battery embedded architecture for supplying appropriate voltage
K Matsumoto, H Mori

Abstract


2018

Electrical connecting structure between a substrate and a semiconductor chip
K Matsumoto, K Okamoto, YK Orii, K Toriyama

Abstract

Chip mounting structure
Akihiro Horibe, Keiji Matsumoto, Keishi Okamoto, Kazushige Toriyama

Abstract


2017

Method, apparatus, and structure for determining interposer thickness
S Hada, A Horibe, K Matsumoto

Abstract

Electrical package including bimetal lid
K Matsumoto, H Mori

Abstract


2016

Substrate device and electric circuit arrangement having first substrate section perpendicular to second substrate section
Thomas J Brunschwiler, Dominic Gschwend, Keiji Matsumoto, Stefano S Oggioni, Gerd Schlottig, Timo J Tick, Jonas Zuercher

Abstract


2014

Reduction of warpage of multilayered substrate or package
Sayuri Hada, Keiji Matsumoto

Abstract


2013

Surface region selection for heat sink placement
Keiji Matsumoto

Abstract

Achieving power supply and heat dissipation (cooling) in three-dimensional multilayer package
Keiji Matsumoto

Abstract


2008

UNDERFILL FILM HAVING THERMALLY CONDUCTIVE SHEET
Keiji Matsumoto

Abstract


2005

THREE LEVEL STACKED REFLECTIVE DISPLAY DEVICE
Keiji Matsumoto, Lubomyr T. Romankiw, Kuniaki Sueoka, Yoichi Taira, Keizoh Takeda

Abstract