Dechao Guo
contact information
Director, Advanced Logic TechnologyIBM Research at Albany Nanotech +1
518
292
7319



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Professional Associations
Professional Associations: IEEE | IEEE Electron Devices Society (EDS) | Sigma Xi2012
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
S Narasimha, P Chang, C Ortolland, D Fried, E Engbrecht, K Nummy, P Parries, T Ando, M Aquilino, N Arnold, others
Electron Devices Meeting (IEDM), 2012 IEEE International, pp. 3--3
S Narasimha, P Chang, C Ortolland, D Fried, E Engbrecht, K Nummy, P Parries, T Ando, M Aquilino, N Arnold, others
Electron Devices Meeting (IEDM), 2012 IEEE International, pp. 3--3
2011
A Manufacturable Dual Channel (Si and SiGe) High-K Metal Gate CMOS Technology with Multiple Oxides for High Performance and Low Power Applications
S. Krishnan, U. Kwon, N. Moumen, M. Stoker, E. C. Harley, S. W. Bedell, D. R. Nair, B. J. Greene, W. K. Henson, M. M. Chowdhury, D. P. Prakash, E. Wu, D. P. Ioannou, E. Cartier, M.-h. Na, S. Inumiya, K. Mcstay, L. Edge, R. Iijima, J. Cai, M. Frank, M. Har
International Electron Devices Meeting, pp. 28-1, 2011
S. Krishnan, U. Kwon, N. Moumen, M. Stoker, E. C. Harley, S. W. Bedell, D. R. Nair, B. J. Greene, W. K. Henson, M. M. Chowdhury, D. P. Prakash, E. Wu, D. P. Ioannou, E. Cartier, M.-h. Na, S. Inumiya, K. Mcstay, L. Edge, R. Iijima, J. Cai, M. Frank, M. Har
International Electron Devices Meeting, pp. 28-1, 2011
2010
Wafer scale fabrication of carbon nanotube FETs with embedded poly-gates
Shu-Jen Han, Josephine Chang, Aaron D Franklin, Ageeth A Bol, Rainer Loesing, Dechao Guo, George S Tulevski, Wilfried Haensch, Zhihong Chen
Electron Devices Meeting (IEDM), 2010 IEEE International, pp. 9--1
Shu-Jen Han, Josephine Chang, Aaron D Franklin, Ageeth A Bol, Rainer Loesing, Dechao Guo, George S Tulevski, Wilfried Haensch, Zhihong Chen
Electron Devices Meeting (IEDM), 2010 IEEE International, pp. 9--1
Intrinsic effective mobility extraction with extremely scaled gate dielectrics
Z. Liu, D. Guo, K. Xiu, W.K. Henson, P.J. Oldiges
Applied Physics Letters 97(2), 023509--023509, AIP, 2010
Z. Liu, D. Guo, K. Xiu, W.K. Henson, P.J. Oldiges
Applied Physics Letters 97(2), 023509--023509, AIP, 2010
Characterization of Parasitic Bipolar Transistors in 45nm Silicon-On-Insulator Technology
Larry Wissel, Phil Oldiges, and Dechao Guo
2010 IEEE Nuclear and Space Radiation Effects Conference
Larry Wissel, Phil Oldiges, and Dechao Guo
2010 IEEE Nuclear and Space Radiation Effects Conference
2009
High performance 32nm SOI CMOS with high-k/metal gate and 0.149$\mu$m 2 SRAM and ultra low-k back end with eleven levels of copper
B Greene, Q Liang, K Amarnath, Y Wang, J Schaeffer, M Cai, Y Liang, S Saroop, J Cheng, A Rotondaro, others
VLSI Technology, 2009 Symposium on, pp. 140--141
B Greene, Q Liang, K Amarnath, Y Wang, J Schaeffer, M Cai, Y Liang, S Saroop, J Cheng, A Rotondaro, others
VLSI Technology, 2009 Symposium on, pp. 140--141
Reverse Temperature Dependence of Circuit Performance in High-$ kappa $/Metal-Gate Technology
S J Han, D Guo, X Wang, A C Mocuta, W K Henson, K Rim
Electron Device Letters, IEEE 30(12), 1344--1346, IEEE, 2009
S J Han, D Guo, X Wang, A C Mocuta, W K Henson, K Rim
Electron Device Letters, IEEE 30(12), 1344--1346, IEEE, 2009
High Performance 32nm SOI CMOS with High-K/Metal Gate and 0.149um2 SRAM and Ultra Low-K Back End with Eleven Levels of Copper
B. Greene, Q. Liang, K. Amarnath, Y. Wang, J. Schaeffer, ....J. Sleight, D. Guo, S. Mittl, D. Ioannou, E. Wu, M. Chudzik, D-G. Park, D. Brown, S. Luning, D. Mocuta, E. Maciejewski, K. Henson and E. Leobandung,
Symposium on VLSI Technology and Circuits, 2009
B. Greene, Q. Liang, K. Amarnath, Y. Wang, J. Schaeffer, ....J. Sleight, D. Guo, S. Mittl, D. Ioannou, E. Wu, M. Chudzik, D-G. Park, D. Brown, S. Luning, D. Mocuta, E. Maciejewski, K. Henson and E. Leobandung,
Symposium on VLSI Technology and Circuits, 2009
Stress Liner Proximity Technique to Enhance Carrier Mobility in High-k/Metal Gate MOSFETs
D. Guo, K. Schonenberg, J. Chen, D. Jaeger, P. Kulkarni, U. Kwon, Y. Liang, J. Liu, L. Song, F. Arnaud, H. Bu, M. Chudzik, K. Henson, P. Oldiges, M. Sherony, A. Steegen, A. Thean, M. Khare
MRS Fall Meeting, 2009
D. Guo, K. Schonenberg, J. Chen, D. Jaeger, P. Kulkarni, U. Kwon, Y. Liang, J. Liu, L. Song, F. Arnaud, H. Bu, M. Chudzik, K. Henson, P. Oldiges, M. Sherony, A. Steegen, A. Thean, M. Khare
MRS Fall Meeting, 2009
2008
On the difference of temperature dependence of metal gate and poly gate SOI MOSFET threshold voltages
Shu-Jen Han, Xinlin Wang, Paul Chang, Dechao Guo, Myung-Hee Na, Ken Rim
Electron Devices Meeting, 2008. IEDM 2008. IEEE International, pp. 1--4
Shu-Jen Han, Xinlin Wang, Paul Chang, Dechao Guo, Myung-Hee Na, Ken Rim
Electron Devices Meeting, 2008. IEDM 2008. IEEE International, pp. 1--4
Gate length scaling and high drive currents enabled for high performance SOI technology using high-$\kappa$/metal gate
K Henson, H Bu, MH Na, Y Liang, U Kwon, S Krishnan, J Schaeffer, R Jha, .., M Hargrove, D Guo, others
IEEE International Electron Devices Meeting, 2008, pp. 1--4
K Henson, H Bu, MH Na, Y Liang, U Kwon, S Krishnan, J Schaeffer, R Jha, .., M Hargrove, D Guo, others
IEEE International Electron Devices Meeting, 2008, pp. 1--4
2007
Effective Capture Cross-Sections of Traps in High-k Gate Dielectrics
Liyang Song, Xiewen Wang, Dechao Guo, and T.P. Ma
Electrochemical Society Transactions 6(1), 229-237, 2007
Liyang Song, Xiewen Wang, Dechao Guo, and T.P. Ma
Electrochemical Society Transactions 6(1), 229-237, 2007
2006
Gate-dielectric permitivity and metal-gate work-function tradeoff in L met= 25nm PDSOI device characteristics
D Guo, A Bryant, X Wang, S Narasimha, R Miller, M Khare
IEEE Electron Device Letters 27(6), 505--507, 2006
D Guo, A Bryant, X Wang, S Narasimha, R Miller, M Khare
IEEE Electron Device Letters 27(6), 505--507, 2006
Challenges and opportunities for high performance 32 nm CMOS technology
JW Sleight, I Lauer, O Dokumaci, DM Fried, D Guo, B Haran, S Narasimha, C Sheraw, D Singh, M Steigerwalt, others
Electron Devices Meeting, 2006. IEDM'06. International, pp. 1--4
JW Sleight, I Lauer, O Dokumaci, DM Fried, D Guo, B Haran, S Narasimha, C Sheraw, D Singh, M Steigerwalt, others
Electron Devices Meeting, 2006. IEDM'06. International, pp. 1--4
2005
High performance gate first HfSiON dielectric satisfying 45nm node requirements
M. A. Quevedo-Lopez, S. A. Krishnan, P. D. Kirsch, H. J. Li, J. H. Sim, C. Huffman, J. J. Peterson, B .H. Lee, G. Pant1, B. E. Gnade1, M. J. Kim1, R. M. Wallace1, D. Guo, H. Bu, and T.P. Ma
International Electron Device Meeting, pp. 428, 2005
M. A. Quevedo-Lopez, S. A. Krishnan, P. D. Kirsch, H. J. Li, J. H. Sim, C. Huffman, J. J. Peterson, B .H. Lee, G. Pant1, B. E. Gnade1, M. J. Kim1, R. M. Wallace1, D. Guo, H. Bu, and T.P. Ma
International Electron Device Meeting, pp. 428, 2005
An EOT Extraction Method Based on Generalized 4-element Circuit Model for Ultrathin Gate Dielectrics
D. C. Guo, L. Y. Song, T. P. Ma,
36th Semiconductor Interface Specialist Conference, 2005
D. C. Guo, L. Y. Song, T. P. Ma,
36th Semiconductor Interface Specialist Conference, 2005
2004
Polarity dependence of charge trapping in poly-silicon gate HfO/sub 2/MOSFETs
M Bu, XW Wang, DC Guo, LY Song, TP Ma, H Tseng, P Tobin
2004 IEEE International Reliability Physics Symposium Proceedings, 2004, pp. 591--592
M Bu, XW Wang, DC Guo, LY Song, TP Ma, H Tseng, P Tobin
2004 IEEE International Reliability Physics Symposium Proceedings, 2004, pp. 591--592
2001
Characteristics of different structure sub-100nm MOSFETs withhigh-k gate dielectrics
X Liu, S Lou, Z Xia, D Guo, H Zhu, J Kang, R Han
Solid-State and Integrated-Circuit Technology, 2001
X Liu, S Lou, Z Xia, D Guo, H Zhu, J Kang, R Han
Solid-State and Integrated-Circuit Technology, 2001
Year Unknown
Characteristics of Sub-100nm High-k Gate Dielectrics MOSFETs With Different Source/Drain Structure
X Liu, C Ren, Z Xia, L Han, S Lou, D Guo, J Kang, R Han
essderc2002.deis.unibo.it
X Liu, C Ren, Z Xia, L Han, S Lou, D Guo, J Kang, R Han
essderc2002.deis.unibo.it
The characteristics of leakage current mechanisms and SILC effects of Al2O3 gate dielectric
J Kang, D Han, C Ren, H Yang, D Guo, W Wang, D Tian, J Zhang, Y Wang, X Liu, others
essderc2002.deis.unibo.it
J Kang, D Han, C Ren, H Yang, D Guo, W Wang, D Tian, J Zhang, Y Wang, X Liu, others
essderc2002.deis.unibo.it