Dallas M. Lea
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Senior Engineer, Electrical CharacterizationSemiconductor Technology Research, Albany, NY +914
489
5359


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Professional Associations: Eta Kappa Nu | IEEE | Tau Beta Pimore information
More information: LinkedIn2021
Gate cut critical dimension shrink and active gate defect healing using selective deposition
A. Greene, M. Bergendahl, E.A. De Silva, A.J. Varghese, Y. Mignot, M.T. Shoudy, G.R. Muthinti, D. Lea
A. Greene, M. Bergendahl, E.A. De Silva, A.J. Varghese, Y. Mignot, M.T. Shoudy, G.R. Muthinti, D. Lea
Semiconductor device with linerless contacts
A.J. VarVarghese, M.A. Bergendahl, A.M. Greene, D. Lea, M.T. Shoudy, Y. Mignot, E.A. De Silva, G.R. Muthinti
A.J. VarVarghese, M.A. Bergendahl, A.M. Greene, D. Lea, M.T. Shoudy, Y. Mignot, E.A. De Silva, G.R. Muthinti
2013
CIRCUIT-LEVEL VALIDATION OF COMPUTER EXECUTABLE DEVICE/CIRCUIT SIMULATORS
A Bansal, P Castalino, D M Lea, A Singhee
A Bansal, P Castalino, D M Lea, A Singhee