# Eric M Schwarz
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Distinguished Engineer, z Systems and Power Core Logic Design and Arithmetic Hardware Expert

Poughkeepsie, NY

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Poughkeepsie, NY

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### Professional Associations

**Professional Associations:**IEEE | IEEE Computer Society | IEEE Mid-Hudson Section | IEEE, Senior Member

### more information

**More information:**Symposium on Computer Arithmetic - Steering Committee - General Chair

**2015**

Wiederherstellen von Hardware-Transaktionen Recovering hardware transactions

Maged Milad Michael, Michael K. Gschwind, Harold Wade Cain, Valentina Salapura, Eric Mark Schwarz

2015

Abstract transactional memory, transactional leadership, database transaction, computer hardware, computer science

Maged Milad Michael, Michael K. Gschwind, Harold Wade Cain, Valentina Salapura, Eric Mark Schwarz

2015

Abstract transactional memory, transactional leadership, database transaction, computer hardware, computer science

The SIMD accelerator for business analytics on the IBM z13

Schwarz, E.M. Krishnamurthy, R.B. ; Parris, C.J. ; Bradbury, J.D. ; Nnebe, I.M. ; Gschwind, M.

Abstract

Schwarz, E.M. Krishnamurthy, R.B. ; Parris, C.J. ; Bradbury, J.D. ; Nnebe, I.M. ; Gschwind, M.

*IBM Journal of Research and Development**59*(*4/5*), 2015Abstract

**2014**

Anweisung "Vector floating point test data class immediate" Instructions "Vector Floating Point test DataClass immediate"

Jonathan David Bradbury, Eric Mark Schwarz

2014

Abstract operand, test data, floating point, calculus, arithmetic, engineering

Jonathan David Bradbury, Eric Mark Schwarz

2014

Abstract operand, test data, floating point, calculus, arithmetic, engineering

Identification de lignes de memoire cache hautement conflictuelles dans des environnements informatiques a memoire transactionnelle

Fadi Y. Busaba, Iii Harold W. Cain, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum

2014

Abstract cache, performance art, art

Fadi Y. Busaba, Iii Harold W. Cain, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum

2014

Abstract cache, performance art, art

**2013**

Anweisung zum Drehen und Einfugen eines Vektorelements unter einer Maske Instructions for turning and inserting a vector element under a mask

Jonathan David Bradbury, Eric Mark Schwarz, Timothy Slegel, Robert Frederick Enenkel

2013

Abstract operand, computer hardware, mathematics

Jonathan David Bradbury, Eric Mark Schwarz, Timothy Slegel, Robert Frederick Enenkel

2013

Abstract operand, computer hardware, mathematics

Instructions "Vector generate mask"

Jonathan David Bradbury, Timothy Slegel, Eric Mark Schwarz, Robert Frederick Enenkel

2013

Abstract mask, operand, computer hardware, computer science

Jonathan David Bradbury, Timothy Slegel, Eric Mark Schwarz, Robert Frederick Enenkel

2013

Abstract mask, operand, computer hardware, computer science

**2012**

Umwandlung von gezontem format in dezimales gleitkommaformat

Steven Carlough, Eric Mark Schwarz, Timothy Slegel, Charles Gainey, Marcel Mitran, Reid Copeland

2012

Steven Carlough, Eric Mark Schwarz, Timothy Slegel, Charles Gainey, Marcel Mitran, Reid Copeland

2012

**2011**

Self Checking in Current Floating-Point Units

Daniel Lipetz, Eric Schwarz

Abstract decimal data type, decimal floating point, power6, floating point unit, radix, decimal, floating point, binary number, parallel computing, computer science

Daniel Lipetz, Eric Schwarz

*2011 IEEE 20th Symposium on Computer Arithmetic*,*pp. 73-76*Abstract decimal data type, decimal floating point, power6, floating point unit, radix, decimal, floating point, binary number, parallel computing, computer science

The zEnterprise 196 system and microprocessor

Brian W Curran, Lee E Eisen, Eric M Schwarz, Pak-kin Mak, James Warnock, Patrick J Meaney, Michael Fee

Brian W Curran, Lee E Eisen, Eric M Schwarz, Pak-kin Mak, James Warnock, Patrick J Meaney, Michael Fee

*IEEE Micro**31*(*2*), 0026--40, IEEE Computer Society, 2011
A 5.2GHz microprocessor chip for the IBM zEnterprise(TM) system

James D. Warnock, Y. Chan, William V. Huott, Sean M. Carey, Michael F. Fee, Huajun Wen, M. J. Saccamango, Frank Malgioglio, Patrick J. Meaney, Donald W. Plass, Yuen H. Chan, Mark D. Mayo, Guenter Mayer, Leon J. Sigal, David L. Rude, Robert M. Averill, Mic

Abstract ibm, microprocessor, capacitance, chip, embedded system, computer science

James D. Warnock, Y. Chan, William V. Huott, Sean M. Carey, Michael F. Fee, Huajun Wen, M. J. Saccamango, Frank Malgioglio, Patrick J. Meaney, Donald W. Plass, Yuen H. Chan, Mark D. Mayo, Guenter Mayer, Leon J. Sigal, David L. Rude, Robert M. Averill, Mic

*2011 IEEE International Solid-State Circuits Conference*,*pp. 70-72*Abstract ibm, microprocessor, capacitance, chip, embedded system, computer science

**2010**

A 270ps 20mW 108-bit end-around carry adder for multiply-add fused floating point unit

Zhang, Xiao Yan and Chan, Yiu-Hing and Montoye, Robert and Sigal, Leon and Schwarz, Eric and Kelly, Michael

Abstract

Zhang, Xiao Yan and Chan, Yiu-Hing and Montoye, Robert and Sigal, Leon and Schwarz, Eric and Kelly, Michael

*Journal of Signal Processing Systems**58*(*2*), 139--144, Springer, 2010Abstract

A survey of hardware designs for decimal arithmetic

Liang-Kai Wang, Mark A. Erle, Charles Tsen, Eric M. Schwarz, Michael J. Schulte

Abstract decimal data type, decimal64 floating point format, decimal computer, decimal128 floating point format, decimal32 floating point format, decimal floating point, saturation arithmetic, division by two, theoretical computer science, arithmetic, computer har

Liang-Kai Wang, Mark A. Erle, Charles Tsen, Eric M. Schwarz, Michael J. Schulte

*Ibm Journal of Research and Development**54*(*2*), 216-230, 2010Abstract decimal data type, decimal64 floating point format, decimal computer, decimal128 floating point format, decimal32 floating point format, decimal floating point, saturation arithmetic, division by two, theoretical computer science, arithmetic, computer har

**2009**

Guest Editors Introduction: Special Section on Comuter Arithmetic

Peter Kornerup, Paolo Montuschi, Jean-Michel Muller, Eric Schwarz

Abstract elementary arithmetic, decimal, mathematical proof, multiplication, elementary function, arithmetic, algebra, computer science

Peter Kornerup, Paolo Montuschi, Jean-Michel Muller, Eric Schwarz

*IEEE Transactions on Computers**58*(*2*), 145-147, 2009Abstract elementary arithmetic, decimal, mathematical proof, multiplication, elementary function, arithmetic, algebra, computer science

Decimal floating-point support on the IBM system z10 processor

Eric M. Schwarz, John S. Kapernick, Mike F. Cowlishaw

Abstract decimal computer, ibm 8514, ibm floating point architecture, queued telecommunications access method, ebcdic, power6, binary coded decimal, word, computer architecture, parallel computing, computer science

Eric M. Schwarz, John S. Kapernick, Mike F. Cowlishaw

*Ibm Journal of Research and Development**53*(*1*), 36-45, 2009Abstract decimal computer, ibm 8514, ibm floating point architecture, queued telecommunications access method, ebcdic, power6, binary coded decimal, word, computer architecture, parallel computing, computer science

**2008**

Method for executing a load instruction in a pipeline processor, putting the data in the target address into a buffer then loading the requested data

Son Dao Trong, Juergen Haess, David Shane Hutton, Michael Klein, John Gilbert Rell, Eric Mark Schwarz, Kevin Chung-Lung Shum

2008

Abstract execution unit, floating point unit, real time computing, computer science

Son Dao Trong, Juergen Haess, David Shane Hutton, Michael Klein, John Gilbert Rell, Eric Mark Schwarz, Kevin Chung-Lung Shum

2008

Abstract execution unit, floating point unit, real time computing, computer science

**2007**

P6 Binary Floating-Point Unit

Son Dao Trong, Martin S. Schmookler, Eric M. Schwarz, Michael Kroener

Abstract fo4, floating point unit, rounding, powerpc, normalization, binary number, circuit design, linear approximation, real time computing, parallel computing, computer science

Son Dao Trong, Martin S. Schmookler, Eric M. Schwarz, Michael Kroener

*18th IEEE Symposium on Computer Arithmetic (ARITH 07)*,*pp. 77-86*, 2007Abstract fo4, floating point unit, rounding, powerpc, normalization, binary number, circuit design, linear approximation, real time computing, parallel computing, computer science

IBM POWER6 accelerators: VMX and DFU

L. Eisen, J. W. Ward Iii, H.-W. Tast, N. Mading, J. Leenstra, S. M. Mueller, C. Jacobi, J. Preiss, E. M. Schwarz, S. R. Carlough

Abstract decimal data type, decimal computer, decimal128 floating point format, real time computing, parallel computing, computer science

L. Eisen, J. W. Ward Iii, H.-W. Tast, N. Mading, J. Leenstra, S. M. Mueller, C. Jacobi, J. Preiss, E. M. Schwarz, S. R. Carlough

*Ibm Journal of Research and Development**51*(*6*), 663-683, 2007Abstract decimal data type, decimal computer, decimal128 floating point format, real time computing, parallel computing, computer science

**2006**

Binary Floating-Point Unit Design

Eric M. Schwarz

2006

Abstract sign extension, multiply accumulate operation, floating point unit, dataflow, adder, binary number, parallel computing, computer science

Eric M. Schwarz

2006

Abstract sign extension, multiply accumulate operation, floating point unit, dataflow, adder, binary number, parallel computing, computer science

A 5GHz+ 128-bit binary floating-point adder for the POWER6 processor

Xiao Yan Yu, Yiu-Hing Chan, Brian Curran, Eric Schwarz, Michael Kelly, Bruce Fleischer

Xiao Yan Yu, Yiu-Hing Chan, Brian Curran, Eric Schwarz, Michael Kelly, Bruce Fleischer

*Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European*,*pp. 166--169*
4GHz+ low-latency fixed-point and binary floating-point execution units for the POWER6 processor

B. Curran, B. McCredie, L. Sigal, E. Schwarz, B. Fleischer, Y.-H. Chan, D. Webber, M. Vaden, A. Goyal

Abstract fo4, power6, execution unit, floating point unit, fixed point arithmetic, low latency, floating point, fixed point, electronic engineering, real time computing, parallel computing, computer science

B. Curran, B. McCredie, L. Sigal, E. Schwarz, B. Fleischer, Y.-H. Chan, D. Webber, M. Vaden, A. Goyal

*2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers*,*pp. 1728-1734*Abstract fo4, power6, execution unit, floating point unit, fixed point arithmetic, low latency, floating point, fixed point, electronic engineering, real time computing, parallel computing, computer science

**2005**

Proceedings 17th IEEE Symposium on Computer Arithmetic

Paolo Montuschi, E. Schwarz

2005

software engineering, computer science

Paolo Montuschi, E. Schwarz

2005

software engineering, computer science

FPU implementations with denormalized numbers

Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong

Abstract minifloat, denormal number, double precision floating point format, floating point unit, implementation, floating point, software, real time computing, parallel computing, computer science

Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong

*IEEE Transactions on Computers**54*(*7*), 825-836, 2005Abstract minifloat, denormal number, double precision floating point format, floating point unit, implementation, floating point, software, real time computing, parallel computing, computer science

Decimal multiplication with efficient partial product generation

Mark A. Erle, Eric M. Schwarz, Michael J. Schulte

Abstract decimal128 floating point format, decimal32 floating point format, theoretical computer science, arithmetic, parallel computing, computer science

Mark A. Erle, Eric M. Schwarz, Michael J. Schulte

*17th IEEE Symposium on Computer Arithmetic (ARITH05)*,*pp. 21-28*, 2005Abstract decimal128 floating point format, decimal32 floating point format, theoretical computer science, arithmetic, parallel computing, computer science

**2004**

The IBM eServer z990 floating-point unit

G Gerwig, H Wetter, EM Schwarz, J Haess, CA Krygowski, BM Fleischer, M Kroener

G Gerwig, H Wetter, EM Schwarz, J Haess, CA Krygowski, BM Fleischer, M Kroener

*IBM Journal of Research and Development**48*(*3.4*), 311--322, IBM, 2004**2003**

Revisions to the IEEE 754 standard for floating-point arithmetic

Eric M. Schwarz

Abstract radix point, ieee floating point, relational operator, floating point unit, decimal, operator, floating point, binary number, theoretical computer science, parallel computing, computer science

Eric M. Schwarz

*Proceedings 2003 16th IEEE Symposium on Computer Arithmetic*,*pp. 112-112*Abstract radix point, ieee floating point, relational operator, floating point unit, decimal, operator, floating point, binary number, theoretical computer science, parallel computing, computer science

High performance floating-point unit with 116 bit wide divider

Guenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess

Abstract half precision floating point format, quadruple precision floating point format, extended precision, single precision floating point format, denormal number, ibm floating point architecture, ieee floating point, double precision floating point format, com

Guenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess

*Proceedings 2003 16th IEEE Symposium on Computer Arithmetic*,*pp. 87-94*Abstract half precision floating point format, quadruple precision floating point format, extended precision, single precision floating point format, denormal number, ibm floating point architecture, ieee floating point, double precision floating point format, com

Hardware implementations of denormalized numbers

Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong

Abstract denormal number, floating point unit, implementation, number theory, floating point, software, theoretical computer science, computer hardware, parallel computing, computer science

Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong

*Proceedings 2003 16th IEEE Symposium on Computer Arithmetic*,*pp. 70-78*Abstract denormal number, floating point unit, implementation, number theory, floating point, software, theoretical computer science, computer hardware, parallel computing, computer science

**2002**

The microarchitecture of the IBM eServer z900 processor

Eric M. Schwarz, Mark A. Check, Chung-Lung Kevin Shum, Thomas Koehler, Scott B. Swaney, John D. MacDougall, Christopher A. Krygowski

Abstract branch target predictor, microarchitecture, addressability, word, cache, cobol, architecture, data compression, computer architecture, parallel computing, computer science

Eric M. Schwarz, Mark A. Check, Chung-Lung Kevin Shum, Thomas Koehler, Scott B. Swaney, John D. MacDougall, Christopher A. Krygowski

*Ibm Journal of Research and Development**46*, 381-395, 2002Abstract branch target predictor, microarchitecture, addressability, word, cache, cobol, architecture, data compression, computer architecture, parallel computing, computer science

**2001**

A decimal oating-point speci/cation

Mike F. Cowlishaw, Eric M. Schwarz, Richard M. Smith, Charles Webb

2001

decimal, arithmetic, mathematics

Mike F. Cowlishaw, Eric M. Schwarz, Richard M. Smith, Charles Webb

2001

decimal, arithmetic, mathematics

A Decimal FP Specification

Mike F. Cowlishaw, Eric M. Schwarz, Ronald Smith, Charles Webb

2001

decimal, arithmetic, computer science

Mike F. Cowlishaw, Eric M. Schwarz, Ronald Smith, Charles Webb

2001

decimal, arithmetic, computer science

A decimal floating-point specification

Michael F. Cowlishaw, Eric M. Schwarz, Ronald M. Smith, Charles F. Webb

Abstract decimal data type, decimal64 floating point format, decimal128 floating point format, decimal32 floating point format, decimal floating point, division by two, decimal, arbitrary precision arithmetic, theoretical computer science, computer science

Michael F. Cowlishaw, Eric M. Schwarz, Ronald M. Smith, Charles F. Webb

*Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001*,*pp. 147-154*Abstract decimal data type, decimal64 floating point format, decimal128 floating point format, decimal32 floating point format, decimal floating point, division by two, decimal, arbitrary precision arithmetic, theoretical computer science, computer science

The IBM z900 decimal arithmetic unit

Fadi Y Busaba, Christopher A Krygowski, Wen H Li, Eric M Schwarz, Steven R Carlough

Fadi Y Busaba, Christopher A Krygowski, Wen H Li, Eric M Schwarz, Steven R Carlough

*Signals, Systems and Computers, 2001. Conference Record of the Thirty-Fifth Asilomar Conference on*,*pp. 1335--1339***1999**

The S/390 G5 floating-point unit

Eric M. Schwarz, Christopher A. Krygowski

Abstract single precision floating point format, ibm floating point architecture, hexadecimal, ieee floating point, floating point unit, microprocessor, binary number, architecture, parallel computing, computer science

Eric M. Schwarz, Christopher A. Krygowski

*Ibm Journal of Research and Development**43*(*5*), 707-721, 1999Abstract single precision floating point format, ibm floating point architecture, hexadecimal, ieee floating point, floating point unit, microprocessor, binary number, architecture, parallel computing, computer science

The S/390 G5 floating point unit supporting hex and binary architectures

Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski

Abstract half precision floating point format, quadruple precision floating point format, extended precision, single precision floating point format, ibm floating point architecture, ieee floating point, double precision floating point format, long double, compute

Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski

*Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336)*,*pp. 258-265*, 1999Abstract half precision floating point format, quadruple precision floating point format, extended precision, single precision floating point format, ibm floating point architecture, ieee floating point, double precision floating point format, long double, compute

600MHz G5 S/390 Microprocessor

Gregory A. Northrop, Robert M. Averill, Keith G. Barkley, Susan Carey, Y. L. Chan, Yuen H. Chan, Mark A. Check, Dale E. Hoffman, William V. Huott, Barry Krumm, Christopher A. Krygowski, John S. Liptay, Mark D. Mayo, Timothy P. Mcnamara, Tara Mcpherson, Er

1999

microprocessor, computer hardware, computer science

Gregory A. Northrop, Robert M. Averill, Keith G. Barkley, Susan Carey, Y. L. Chan, Yuen H. Chan, Mark A. Check, Dale E. Hoffman, William V. Huott, Barry Krumm, Christopher A. Krygowski, John S. Liptay, Mark D. Mayo, Timothy P. Mcnamara, Tara Mcpherson, Er

1999

microprocessor, computer hardware, computer science

609 MHz G5 S/399 microprocessor

G. Northrop, R. Averill, K. Barkley, S. Carey, Y. Chan, Y.H. Chan, M. Check, D. Hoffman, W. Huott, B. Krumm, C. Krygowski, J. Liptay, M. Mayo, T. McNamara, T. McPherson, E. Schwarz, L.S.T. Siegel, C. Webb, D. Webber, P. Williams

Abstract branch target predictor, ibm, microprocessor, floating point, binary number, cmos, chip, transistor, electronic engineering, computer hardware, computer science

G. Northrop, R. Averill, K. Barkley, S. Carey, Y. Chan, Y.H. Chan, M. Check, D. Hoffman, W. Huott, B. Krumm, C. Krygowski, J. Liptay, M. Mayo, T. McNamara, T. McPherson, E. Schwarz, L.S.T. Siegel, C. Webb, D. Webber, P. Williams

*1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278)*,*pp. 88-89*Abstract branch target predictor, ibm, microprocessor, floating point, binary number, cmos, chip, transistor, electronic engineering, computer hardware, computer science

IBMs S/390 G5 microprocessor design

Timothy J. Slegel, Robert M. Averill Iii, Mark A. Check, Bruce C. Giamei, Barry W. Krumm, Christopher A. Krygowski, Wen H. Li, John S. Liptay, John D. MacDougall, Thomas J. McPherson, Jennifer A. Navarro, Eric M. Schwarz, Kevin Shum, Charles F. Webb

Abstract channel i o, ibm power microprocessors, ibm 8514, index register, cellular architecture, reduced instruction set computing, ibm floating point architecture, ibm san volume controller, computer architecture, parallel computing, computer science

Timothy J. Slegel, Robert M. Averill Iii, Mark A. Check, Bruce C. Giamei, Barry W. Krumm, Christopher A. Krygowski, Wen H. Li, John S. Liptay, John D. MacDougall, Thomas J. McPherson, Jennifer A. Navarro, Eric M. Schwarz, Kevin Shum, Charles F. Webb

*international symposium on microarchitecture*,*pp. 12-23*, 1999Abstract channel i o, ibm power microprocessors, ibm 8514, index register, cellular architecture, reduced instruction set computing, ibm floating point architecture, ibm san volume controller, computer architecture, parallel computing, computer science

**1997**

A radix-8 CMOS S/390 multiplier

Eric M. Schwarz, Robert M. Averill Iii, Leon J. Sigal

Abstract booth s multiplication algorithm, floating point unit, physical design, multiplier, microprocessor, latency, cmos, logic synthesis, parallel computing, computer science

Eric M. Schwarz, Robert M. Averill Iii, Leon J. Sigal

*Proceedings 13th IEEE Sympsoium on Computer Arithmetic*,*pp. 2-9*, 1997Abstract booth s multiplication algorithm, floating point unit, physical design, multiplier, microprocessor, latency, cmos, logic synthesis, parallel computing, computer science

CMOS floating-point unit for the S/390 parallel enterprise server G4

Eric M. Schwarz, Leon J. Sigal, Thomas J. McPherson

Abstract floating point unit, remainder, instructions per cycle, register file, microprocessor, floating point, cmos, chip, real time computing, parallel computing, computer science

Eric M. Schwarz, Leon J. Sigal, Thomas J. McPherson

*Ibm Journal of Research and Development**41*, 475-488, 1997Abstract floating point unit, remainder, instructions per cycle, register file, microprocessor, floating point, cmos, chip, real time computing, parallel computing, computer science

**1996**

Hardware starting approximation method and its application to the square root operation

Eric M. Schwarz, Michael J. Flynn

Abstract square root, trigonometric functions, logarithm, lookup table, approximation theory, linear approximation, rate of convergence, iterative method, discrete mathematics, computer hardware, mathematical optimization, parallel computing, mathematics

Eric M. Schwarz, Michael J. Flynn

*IEEE Transactions on Computers**45*(*12*), 1356-1369, 1996Abstract square root, trigonometric functions, logarithm, lookup table, approximation theory, linear approximation, rate of convergence, iterative method, discrete mathematics, computer hardware, mathematical optimization, parallel computing, mathematics

**1995**

Rounding for quadratically converging algorithms for division and square root

Eric M. Schwarz

Abstract ieee floating point, quadratic growth, remainder, rounding, square root, floating point, rate of convergence, iterative method, discrete mathematics, mathematical optimization, algorithm, mathematics

Eric M. Schwarz

*Conference Record of The Twenty-Ninth Asilomar Conference on Signals, Systems and Computers*,*pp. 600-603*, 1995Abstract ieee floating point, quadratic growth, remainder, rounding, square root, floating point, rate of convergence, iterative method, discrete mathematics, mathematical optimization, algorithm, mathematics

**1993**

Correction to Hard-wired multipliers with encoded partial products

S. Vassiliadis, E.M. Schwarz

Abstract typographical error, error detection and correction, parallel computing, computer science

S. Vassiliadis, E.M. Schwarz

*IEEE Transactions on Computers**42*(*1*), 127-134, 1993Abstract typographical error, error detection and correction, parallel computing, computer science

High-radix algorithms for high-order arithmetic operations

Eric Mark Schwarz

1993

Abstract saturation arithmetic, algebraic operation, square root, trigonometric functions, arbitrary precision arithmetic, multiplexer, logic gate, polynomial, discrete mathematics, arithmetic, algorithm, mathematics

Eric Mark Schwarz

1993

Abstract saturation arithmetic, algebraic operation, square root, trigonometric functions, arbitrary precision arithmetic, multiplexer, logic gate, polynomial, discrete mathematics, arithmetic, algorithm, mathematics

Hardware starting approximation for the square root operation

Eric M. Schwarz, Michael J. Flynn

Abstract saturation arithmetic, square root, arbitrary precision arithmetic, multiplication, lookup table, latency, polynomial, iterative method, theoretical computer science, discrete mathematics, computer hardware, mathematical optimization, mathematics

Eric M. Schwarz, Michael J. Flynn

*Proceedings of IEEE 11th Symposium on Computer Arithmetic*,*pp. 103-111*, 1993Abstract saturation arithmetic, square root, arbitrary precision arithmetic, multiplication, lookup table, latency, polynomial, iterative method, theoretical computer science, discrete mathematics, computer hardware, mathematical optimization, mathematics

**1991**

Hard-wired multipliers with encoded partial products

Stamatis Vassiliadis, Eric M. Schwarz, Baik Moon Sung

Abstract freivalds algorithm, multiplication algorithm, two s complement, matrix multiplication, multiplication, matrix, parallel computing, mathematics

Stamatis Vassiliadis, Eric M. Schwarz, Baik Moon Sung

*IEEE Transactions on Computers**40*(*11*), 1181-1197, 1991Abstract freivalds algorithm, multiplication algorithm, two s complement, matrix multiplication, multiplication, matrix, parallel computing, mathematics

**1989**

Paritatsvorausbestimmung fur Binaraddierer mit Auswahl. Parity prediction for binary adder with selection

Stamatis Vassiliadis, Eric Mark Schwarz, Brice John Feal, Michael Putrino

1989

adder, parity, statistics, mathematics

Stamatis Vassiliadis, Eric Mark Schwarz, Brice John Feal, Michael Putrino

1989

adder, parity, statistics, mathematics

Parity predictor for shifting-output adders

S. Vassiliadis, M. Putrino, E.M. Schwarz

Abstract carry save adder, order of magnitude, least significant bit, adder, critical path method, parity, logic gate, electronic engineering, mathematics

S. Vassiliadis, M. Putrino, E.M. Schwarz

*Electronics Letters**25*(*6*), 422-424, 1989Abstract carry save adder, order of magnitude, least significant bit, adder, critical path method, parity, logic gate, electronic engineering, mathematics

A general proof for overlapped multiple-bit scanning multiplications

Stamatis Vassiliadis, Eric M. Schwarz, Don J. Hanrahan

Abstract binary multiplier, mathematical proof, natural number, correctness, multiplication, inequality, decoding methods, parallel processing, theoretical computer science, parallel computing, mathematics

Stamatis Vassiliadis, Eric M. Schwarz, Don J. Hanrahan

*IEEE Transactions on Computers**38*(*2*), 172-183, 1989Abstract binary multiplier, mathematical proof, natural number, correctness, multiplication, inequality, decoding methods, parallel processing, theoretical computer science, parallel computing, mathematics

**1988**

Invited paper Parallel binary byte adder/subtracter

M. Putrino, S. Vassiliadis, E. Schwarz

Abstract instruction set, byte, subtraction, microcode, adder, binary data, binary number, boolean algebra, theoretical computer science, parallel computing, computer science

M. Putrino, S. Vassiliadis, E. Schwarz

*International Journal of Electronics**65*(*2*), 139-153, 1988Abstract instruction set, byte, subtraction, microcode, adder, binary data, binary number, boolean algebra, theoretical computer science, parallel computing, computer science

Unified multi-bit overlapped-scanning multiplier algorithm

S. Vassiliadis, M. Putrino, E.M. Schwarz

Abstract unification, integer, notation, multiplication, multiplier, computation, electronic circuit, discrete mathematics, algorithm, mathematics

S. Vassiliadis, M. Putrino, E.M. Schwarz

*Proceedings of the IEEE Southern Tier Technical Conference*, 68-75, 1988Abstract unification, integer, notation, multiplication, multiplier, computation, electronic circuit, discrete mathematics, algorithm, mathematics

Parallel encrypted array multipliers

Stamatis Vassiliadis, Michael Putrino, Eric M. Schwarz

Abstract multiplication algorithm, matrix calculus, parallel array, binary operation, adder, multiplication, encryption, matrix, theoretical computer science, electronic engineering, parallel computing, mathematics

Stamatis Vassiliadis, Michael Putrino, Eric M. Schwarz

*Ibm Journal of Research and Development**32*(*4*), 536-551, 1988Abstract multiplication algorithm, matrix calculus, parallel array, binary operation, adder, multiplication, encryption, matrix, theoretical computer science, electronic engineering, parallel computing, mathematics

**1987**

Erratum: Direct twos-complement algorithm for XY Z

S. Vassiliadis, M. Putrino, E. Schwarz

saturation arithmetic, two s complement, multiplication, algorithm, mathematics

S. Vassiliadis, M. Putrino, E. Schwarz

*Electronics Letters**23*(*14*), 1987saturation arithmetic, two s complement, multiplication, algorithm, mathematics

Array twos-complement multiplier and square function

M. Putrino, S. Vassiliadis, E. Schwarz

Abstract two s complement, row, square, multiplier, very large scale integration, matrix, electronic engineering, discrete mathematics, mathematics

M. Putrino, S. Vassiliadis, E. Schwarz

*Electronics Letters**23*(*22*), 1185-1187, 1987Abstract two s complement, row, square, multiplier, very large scale integration, matrix, electronic engineering, discrete mathematics, mathematics

Direct Computation of the Polynomial Expression Ax/sup 2/ + Bx + C

E. Schwarz, S. Vassiliadis, M. Putrino

Abstract transcendental function, arithmetic function, multiplication, concurrent computing, computation, polynomial, power series, matrix, discrete mathematics, mathematics

E. Schwarz, S. Vassiliadis, M. Putrino

*Proceedings of the 1987 IEEE Southern Tier Technical Conference, 1987.*, 101-111Abstract transcendental function, arithmetic function, multiplication, concurrent computing, computation, polynomial, power series, matrix, discrete mathematics, mathematics