Sudhir Gowda  Sudhir Gowda photo         

contact information

Institute Director, IBM Research Frontiers Institute
Thomas J. Watson Research Center, Yorktown Heights, NY USA
  +1dash914dash945dash4156

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Professional Associations

Professional Associations:  IEEE


2009

A 19Gb/s 38mW 1-Tap Speculative DFE receiver in 90nm CMOS
Didem Z Turker, Alexander Rylyakov, Daniel Friedman, Sudhir Gowda, Edgar Sanchez-Sinencio
VLSI Circuits, 2009 Symposium on, pp. 216--217


2006

A 10-Gb/s 5-tap DFE/4-tap FFE transceiver in 90-nm CMOS technology
J F Bulzacchelli, M Meghelli, S V Rylov, W Rhee, A V Rylyakov, H A Ainspan, B D Parker, M P Beakes, A Chung, T J Beukema, others
Solid-State Circuits, IEEE Journal of 41(12), 2885--2900, IEEE, 2006


2005

Characterization of equalized 10-Gb/s multimode fibre LAN links using transverse 7-tap analog FIR filter in 0.13-/spl mu/m CMOS
Risteski, A and Reynolds, S and Tierno, J and Schares, L and Gowda, S and Kash, JA and Pepeljugoski, P
Optical Communication, 2005. ECOC 2005. 31st European Conference on, pp. 577--578
Abstract

10+ Gb/s 90-nm CMOS serial link demo in CBGA package
Rylov, Sergey and Reynolds, Scott and Storaska, Daniel and Floyd, Brian and Kapur, Mohit and Zwick, Thomas and Gowda, Sudhir and Sorna, Michael
IEEE journal of solid-state circuits 40(9), 1987--1991, IEEE, 2005
Abstract


2004

DMD characterization of legacy multimode fibers at 1300 nm for link equalization purposes
P Pepelijugoski, A Risteski, J Tierno, J Schaub, J Kash, S Gowda
Lasers and Electro-Optics Society, 2004, pp. 987--988

10+ Gb/s 90nm CMOS serial link demo in CBGA package
Rylov, Sergey and Reynolds, Scott and Storaska, Daniel and Floyd, Brian and Kapur, Mohit and Zwick, Thomas and Gowda, Sudhir and Sorna, Michael
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004, pp. 27--30
Abstract


2003

A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop
W Rhee, H Ainspan, S Rylov, A Rylyakov, M Beakes, D Friedman, S Gowda, M Soyuer
CICC 2003

A 30Gb/s 1: 4 demultiplexer in 0.12/spl mu/m CMOS
Rylyakov, Alexander and Rylov, Sergey and Ainspan, Herschel and Gowda, Sudhir
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International, pp. 176--486
Abstract

Improved performance of 10 Gb/s multimode fiber optic links using equalization
P K Pepeljugoski, J D Schaub, J Tierno, B Wilson, J A Kash, S Gowda, H Wu, A Hajimiri
Optical Fiber Communication Conference, 2003

Integrated transversal equalizers in high-speed fiber-optic systems
H Wu, J A Tierno, P Pepeljugoski, J Schaub, S Gowda, J A Kash, A Hajimiri
Solid-State Circuits, IEEE Journal of 38(12), 2131--2137, IEEE, 2003


2002

A 1.3 GSample/s 10-tap full-rate variable-latency self-timed FIR filter with clocked interfaces
J Tierno, A Rylyakov, S Rylov, M Singh, P Ampadu, S Nowick, M Immediato, S Gowda
Solid-State Circuits Conference, 2002, pp. 60--444


1997

A single chip transceiver for infrared communications
Rogers, Dennis and Gowda, Sudhir and Ritter, Mark and Ananth, Ravi
Bipolar/BiCMOS Circuits and Technology Meeting, 1997. Proceedings of the, pp. 177--179
Abstract


1996

Circuit and system challenges in IR wireless communication
MB Ritter, F Gfeller, W Hirt, D Rogers, S Gowda
1996 IEEE International Solid-State Circuits Conference, 1996, pp. 398--399


1995

Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications
Shin, Hyun J and Pearson, Dale J and Reynolds, Scott K and Megdanis, Andrew C and Gowda, S and Wrenner, Kevin R
IBM Journal of Research and Development 39(1.2), 83--91, IBM, 1995
Abstract

Design, fabrication, and automated testing of 32-channel integrated MSM/MESFET optoelectronic integrated circuit (OEIC) receiver arrays
Rogers, Dennis L and Walker, S and Gowda, Sudhir and Ainspan, H
Optoelectronic Interconnects III, pp. 296--300, 1995
Abstract

250 MHz digital FIR filters for PRML disk read channels
DJ Pearsen, SK Reynolds, AC Megdanis, S Gowda, KR …
Solid-State Circuits Conference, 1995. Digest of Technical …, 1995 - ieeexplore.ieee.org

Digital FIR filters for high speed PRML disk read channels
DJ Pearson, SK Reynolds, AC Megdanis, S Gowda, KR …
Solid-State Circuits, IEEE Journal of, 1995 - ieeexplore.ieee.org

Technology development of a high-density 32-channel 16-Gb/s optical data link for optical interconnection applications for the optoelectronic technology consortium (OETC)
Wong, Yiu-Man and Muehlner, Dirk J and Faudskar, CC and Buchholz, D Bruce and Fishteyn, Mikhail and Brandner, James L and Parzygnat, WJ and Morgan, Robert A and Mullally, Theodore and Leibenguth, RE and others
Journal of Lightwave Technology 13(6), 995--1016, IEEE, 1995
Abstract


1994

Testing of programmable analog neural network chips
Gowda, Sudhir M and Sheu, Bing J and Hsu, Wen-Jay
Journal of VLSI signal processing systems for signal, image and video technology 8(3), 267--282, Springer, 1994
Abstract

BSIM-plus: An advanced MOS transistor model for VLSI circuits.
Gowda, Sudhir M A M
1994 - elibrary.ru
Abstract

Effective parameter extraction using multiple-objective function for VLSI circuits
Gowda, Sudhir M and Sheu, Bing J and Chang, Robert C-H
Analog Integrated Circuits and Signal Processing 5(2), 121--133, Springer, 1994
Abstract

BSIM plus: an advanced SPICE model for submicron MOS VLSI circuits
Gowda, Sudhir M and Sheu, Bing J
IEEE transactions on computer-aided design of integrated circuits and systems 13(9), 1166--1170, IEEE, 1994
Abstract


1993

Reliability assessment of self-timed VLSI circuits
Chang, Chen-Hao and Sheu, BJ and Gowda, SM
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993, pp. 30--3
Abstract

Advanced VLSI circuit simulation using the BSIM
Gowda, SM and Sheu, BJ and Chang, Chen-Hao
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993, pp. 14--3
Abstract

Design and characterization of analog VLSI neural network modules
Gowda, Sudhir M and Sheu, Bing J and Choi, Joongho and Hwang, C-G and Cable, James S
IEEE journal of solid-state circuits 28(3), 301--313, IEEE, 1993
Abstract


1992

Explicit geometry dependence of MOS transistor parameters by the pseudoboundary method
Gowda, Sudhir M and Sheu, Bing J
Analog Integrated Circuits and Signal Processing 2(2), 105--115, Springer, 1992
Abstract

Advanced integrated-circuit reliability simulation including dynamic stress effects
Hsu, W-J and Sheu, Bing J and Gowda, Sudhir M and Hwang, C-G
IEEE journal of solid-state circuits 27(3), 247--257, IEEE, 1992
Abstract


1991

Integrated-circuit reliability simulation with emphasis on hot-carrier effects
Hsu, Wen-Jay and Gowda, Sudhir M and Sheu, Bing J
Analog Integrated Circuits and Signal Processing 1(3), 231--245, Springer, 1991
Abstract

Integrated-circuit reliability simulation including dynamic stress effects
Hsu, W-J and Gowda, SM and Sheu, Bing J and Hwang, Chang-Gyu
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991, pp. 4--2
Abstract

Design of reliable VLSI circuits using simulation techniques
Hsu, W-J and Sheu, BJ and Gowda, SM
IEEE Journal of Solid-State Circuits 26(3), 452--457, IEEE, 1991
Abstract

Analog VLSI neural network implementations of hardware annealing and winner-take-all functions
Choi, Joongho and Sheu, Bing J and Gowda, Sudhir M
Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on, pp. 344--347
Abstract

An accurate MOS transistor model for submicron VLSI circuit-BSIMplus
Gowda, Sudhir M and Sheu, Bing J and Cable, JS
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991, pp. 23--2
Abstract


1990

VLSI circuit design with built-in reliability using simulation techniques
Hsu, W-J and Gowda, SM and Sheu, BJ
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990, pp. 19--3
Abstract