Karthik V Swaminathan  Karthik V Swaminathan photo         

contact information

Research Staff Member, Efficient and Resilient Systems
Thomas J. Watson Research Center, Yorktown Heights, NY USA


Professional Associations

Professional Associations:  ACM  |  IEEE


Impact of Software Approximations on the Resiliency of a Video Summarization System
Radha Venkatagiri, Karthik Swaminathan, Chung-Ching Lin, Liang Wang, Alper Buyuktosunoglu, Pradip Bose
48th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2018), IEEE

Cascaded and Resonant SRAM Supply Boosting for Ultra-Low Voltage Cognitive IoT Applications
Rajiv V. Joshi, Matthew M. Ziegler, Karthik Swaminathan, Nandhini Chandramoorthy
IEEE Custom Integrated Circuits Conference (CICC), 2018

VELOUR: Very Low Voltage Operation Under Resilience Constraints
Schuyler Eldridge, Alec Roelke, Xinfei Guo, Vaibhav Verma, Karthik Swaminathan, Nandhini Chandramoorthy, Martin Cochet, Alper Buyuktosunoglu, Christos Vezyrtzis, Rajiv Joshi, Matt Ziegler, Mircea Stan, Pradip Bose
GOMACTech, 2018


Very Low Voltage (VLV) Design
Ramon Bertran, Karthik Swaminathan, et al.
IEEE International Conference on Computer Design (ICCD), 2017

A Low Voltage RISC-V Heterogeneous System
Schuyler Eldridge, Karthik Swaminathan, Nandhini Chandramoorthy, Alper Buyuktosunoglu, Alec Roelke, Xinfei Guo, Vaibhav Verma, Rajiv Joshi, Mircea Stan, Pradip Bos
First Workshop on Computer Architecture Research with RISC-V (CARRV 2017)

Dynamic Power and Energy Management for Energy Harvesting in Nonvolatile Processor Systems
Kaisheng Ma, Xueqing Li, Huichu Liu, Xiao Seng, Yiqun Wang, Karthik Swaminathan, Yongpan Liu, Yuan Xie, Jack Sampson, Vijaykrishnan Narayanan
ACM Transactions on Embedded Computing Systems (TECS), 2017

SHIVA: An Integrated Toolset for Cross-Layer Modeling in Support of Resilient, Low-Power Embedded Processor Design
Karthik Swaminathan, Ramon Bertran, Schuyler Eldridge, Chen - Yong Cher, Hans Jacobson, Augusto Vega, Alper Buyuktosunoglu, John - David Wellman, Robert Montoye, Pradip Bose
GOMACTech-17, 2017

BRAVO: Balanced Reliability-Aware Voltage Optimization
K. Swaminathan, N. Chandramoorthy, C. Cher, R. Bertran, A. Buyuktosunoglu, P. Bose
International Symposium on High-Performance Computer Architecture (HPCA), 2017


Resilience characterization of a vision analytics application under varying degrees of approximation
Radha Venkatagiri, Karthik Swaminathan, Chung-ching Lin, Liang Wang, Alper Buyuktosunoglu, Pradip Bose, Sarita Adve
2016 IEEE International Symposium on Workload Characterization (IISWC), 1-2, IEEE Computer Society

Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power
K. Ma, X. Li, K. Swaminathan, Y. Zheng, S. Li, Y. Liu, Y. Xie, J. J. Sampson, V. Narayanan
IEEE Micro 36(3), 72-83, 2016


Resilient Mobile Cognition: Algorithms, Innovations, and Architectures
R. Viguier, C. Lin, K. Swaminathan, A. Vega, A. Buyuktosunoglu, S. Pankanti, P. Bose, H. Akbarpour, F. Bunyak, K. Palaniappan, G. Seetharaman.
International Conference on Computer Design (ICCD), Oct 2015.

Resilient, UAV-Embedded Real-Time Computing
A. Vega, C. Lin, K. Swaminathan, A. Buyuktosunoglu, S. Pankanti, P. Bose
International Conference on Computer Design (ICCD), Oct 2015

A Case for Approximate Computing in Real-Time Mobile Cognition
K. Swaminathan, C. Lin, A. Vega, A. Buyuktosunoglu, P. Bose, S. Pankanti.
Workshop on Approximate Computing (WACAS), in conjunction with ASPLOS 2015

Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures
Karthik Swaminathan, Jagadish Kotra, Huichu Liu, Jack Sampson, Mahmut Kandemir, Vijaykrishnan Narayanan
VLSI Design (VLSID), 2015 28th International Conference on, pp. 221--226

Architecture exploration for ambient energy harvesting nonvolatile processors
Kaisheng Ma, Yang Zheng, Shuangchen Li, Karthik Swaminathan, Xueqing Li, Yongpan Liu, Jack Sampson, Yuan Xie, Vijaykrishnan Narayanan
High Performance Computer Architecture (HPCA), 2015 IEEE 21st International Symposium on, pp. 526--537
(Winner of Best Paper award at HPCA 2015)


Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems
Siddharth Advani, Nandhini Chandramoorthy, Karthik Swaminathan, Kevin Irick, Yong Cheol Peter Cho, Jack Sampson, Vijaykrishnan Narayanan
Computer Design (ICCD), 2014 32nd IEEE International Conference on, pp. 501--504

Enabling Power-Efficient Designs with III-V Tunnel FETs
Moon Seok Kim, Huichu Liu, Karthik Swaminathan, Xueqing Li, Suman Datta, Vijaykrishnan Narayanan
Compound Semiconductor Integrated Circuit Symposium (CSICs), 2014 IEEE, pp. 1--4

Modeling steep slope devices: From circuits to architectures
Karthik Swaminathan, Moon Seok Kim, Nandhini Chandramoorthy, Behnam Sedighi, Robert Perricone, Jack Sampson, Vijaykrishnan Narayanan
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014, pp. 1--6

Steep Slope Devices: Enabling New Architectural Paradigms
Karthik Swaminathan, Huichu Liu, Xueqing Li, Moon Seok Kim, Jack Sampson, Vijaykrishnan Narayanan
Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference, pp. 1--6, 2014

Understanding the landscape of accelerators for vision
Nandhini Chandramoorthy, Karthik Swaminathan, Matthew Cotter, Xueqing Li, Indranil Palit, Sharon Hu, Michael Niemier, Kevin Irick
Signal Processing Systems (SiPS), 2014 IEEE Workshop on, pp. 1--6

An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs
Karthik Swaminathan, Huichu Liu, Jack Sampson, Vijaykrishnan Narayanan
Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on, pp. 241--252


Steep-slope devices: From dark to dim silicon
Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T Kandemir, Suman Datta
Micro, IEEE 33(5), 50--59, IEEE, 2013


Design space exploration of workload-specific last-level caches
Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut Kandemir
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design, pp. 243--248

When to forget: A system-level perspective on STT-RAMs
Karthik Swaminathan, Raghav Pisolkar, Cong Xu, Vijaykrishnan Narayanan
Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific, pp. 311--316

Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores
Emre Kultursay, Karthik Swaminathan, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T Kandemir, Suman Datta
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, pp. 245--254, 2012


Enabling architectural innovations using non-volatile memory
Vijaykrishnan Narayanan, Vinay Saripalli, Karthik Swaminathan, Ravindhiran Mukundrajan, Guangyu Sun, Yuan Xie, Suman Datta
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI, pp. 439--444, 2011

Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores
Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut Kandemir, Suman Datta
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design, pp. 247--252, 2011

Towards Resilient Micro-Architectures: Datapath Reliability Enhancement using STT-MRAM
Karthik Swaminathan, Ravindhiran Mukundrajan, Niranjan Soundararajan, Vijaykrishnan Narayanan
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on, pp. 236--241


Performance optimizations for distributed real-time text indexing
Ankur Narang, Karthik Swaminathan, Prashant Agrawal
High Performance Computing (HiPC), 2009 International Conference on, pp. 398--407