Pallab Datta  Pallab Datta photo         

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Research Staff Member : Computer Engineering
Almaden Research Center, San Jose, CA, USA
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Professional Associations

Professional Associations:  ACM  |  IEEE


2020

Hierarchical Parallelism in a Network of Distributed Neural Network Cores
John V. Arthur, Andrew S. Cassidy, Myron D. Flickner, Pallab Datta, Hartmut Penner, Rathinakumar Appuswamy, Jun Sawada, Dharmendra S. Modha, Steven K. Esser, Brian Taba, Jennifer Klamo

Scheduler for Mapping Neural Networks onto an array of Neural Cores in an Inference Processing Unit
Pallab Datta, Andrew S. Cassidy, Myron D. Flickner, Hartmut Penner, Rathinakumar Appuswamy, Jun Sawada, John V. Arthur, Dharmendra S. Modha, Steven K. Esser, Brian Taba, Jennifer Klamo

Instruction Distribution in an Array of Neural Network Cores
Hartmut Penner, Dharmendra S. Modha, John V. Arthur, Andrew S. Cassidy, Rathinakumar Appuswamy, Pallab Datta, Steven K. Esser, Myron D. Flickner, Jennifer Klamo, Jun Sawada, Brian Taba

Scheduler and Simulator for a Area-Efficient, Reconfigurable, Energy-efficient, Speed-efficient Neural Network Substrate
Pallab Datta, Dharmendra S. Modha


2019

Runtime Reconfigurable Neural Network Processor Core
Andrew S. Cassidy, Rathinakumar Appuswamy, John V. Arthur, Pallab Datta, Steven K. Esser, Myron D. Flickner, Jennifer Klamo, Dharmendra S. Modha, Hartmut Penner, Jun Sawada, Brian Taba

Parallel Computational Architecture with Reconfigurable Core-Level and Vector-Level Parallelism
Andrew S. Cassidy, Myron D. Flickner, Pallab Datta, Hartmut Penner, Rathinakumar Appuswamy, Jun Sawada, John V. Arthur, Dharmendra S. Modha, Steven K. Esser, Brian Taba, Jennifer Klamo

Central Scheduler and Instruction Dispatcher for a Neural Inference Processor
Andrew S. Cassidy, Myron D. Flickner, Pallab Datta, Hartmut Penner, Rathinakumar Appuswamy, Jun Sawada, John V. Arthur, Dharmendra S. Modha, Steven K. Esser, Brian Taba, Jennifer Klamo

Block Transfer of Neuron Output Values Through Data Memory for Neurosynaptic Processors
John V. Arthur, Pallab Datta, Steven K. Esser, Dharmendra S. Modha, Jun Sawada

Defect Resistant Designs for Location-Sensitive Neural Network Processor Arrays
Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Myron D. Flickner, Jennifer Klamo, Dharmendra S. Modha, Hartmut Penner, Jun Sawada, Brian Taba

Optimizing Neurosynaptic Networks
Arnon Amir, Pallab Datta, Dharmendra S. Modha

Massively Parallel Neural Inference Computing Elements
Rathinakumar Appuswamy, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Steven K. Esser, Myron D. Flickner, Jennifer Klamo, Dharmendra S. Modha, Hartmut Penner, Jun Sawada, Brian Taba

Functional synthesis of networks of neurosynaptic cores on neuromorphic substrates
Andrew S. Cassidy, Pallab Datta, Myron D. Flickner, Dharmendra S. Modha

Optimizing core utilization in neurosynaptic systems
Arnon Amir, Pallab Datta, Nimrod Megiddo, Dharmendra S. Modha

Hardware-Software Co-Design of Neurosynaptic Systems
John V. Arthur, Pallab Datta, Steven K. Esser, Myron D. Flickner, Dharmendra S. Modha, Tapan K. Nayak

Automatic Timing Resolution among Neural Network Components
Pallab Datta, Myron D. Flickner and Dharmendra S. Modha


2018

Graph partitioning and placement for multi-chip neurosynaptic networks
Arnon Amir, Pallab Datta, Myron D. Flickner, Dharmendra S. Modha, Tapan K. Nayak

Long-Short Term Memory (LSTM) Cells on Spiking Neuromorphic Hardware
Pallab Datta, Rathinakumar Appuswamy, Michael Beyeler, Myron Flickner, Dharmendra S. Modha

Core utilization optimization by dividing computational blocks across cores
Arnon Amir, Pallab Datta, Nimrod Megiddo, Dharmendra Modha

Optimizing neurosynaptic networks
Arnon Amir, Pallab Datta, Dharmendra Modha

Optimizing neuron placement in a neuromorphic system
Rodrigo Alvarez-Icaza, Pallab Datta, Jeffrey A. Kusnitz

Compositional prototypes for scalable neurosynaptic networks
Arnon Amir, Pallab Datta, Dharmendra S. Modha, Benjamin G. Shaw


2017

Mapping of algorithms to neurosynaptic hardware
Arnon Amir, David J. Berg, Pallab Datta, Myron D. Flickner, Paul A. Merolla, Dharmendra S. Modha, Benjamin G. Shaw, Brian S. Taba

Optimizing Core Utilization in Neurosynaptic Systems
Arnon Amir, Pallab Datta, Nimrod Megiddo, Dharmendra S. Modha


2016

Implementing a Neural Network Algorithm on a neurosynaptic substrate based on criteria related to the neurosynaptic substrate
Arnon Amir, Rathinakumar Appuswamy, Pallab Datta, Ben Shaw, Myron Flickner, Paul Merolla, Dharmendra Modha

Compositional Prototypes for scalable Neurosynaptic Networks
Arnon Amir, Pallab Datta, Dharmendra S. Modha, Benjamin G. Shaw

Abstract

Implementing a Neural Network Algorithm on a Neurosynaptic substrate based on metadata associated with the neural network algorithm
Arnon Amir, Rathinakumar Appuswamy, Pallab Datta, Myron D. Flickner, Paul A. Merolla, Dharmendra S. Modha, Benjamin G. Shaw

Abstract

Mapping of Algorithms to Neurosynaptic hardware
Arnon Amir, David J. Berg, Pallab Datta, Myron D. Flickner, Paul A. Merolla, Dharmendra S. Modha, Benjamin G. Shaw, Brian S. Taba

Abstract

Power-Driven Synthesis Under Latency Constraints
Pallab Datta, Gi-Joon Nam, Zhuo Li, Dharmendra S. Modha, Myron D. Flickner, Charles J. Alpert
Patent 20160132765
Abstract

Power Driven Synaptic Network Synthesis
Pallab Datta, Gi-Joon Nam, Zhuo Li, Dharmendra S. Modha, Myron D. Flickner, Charles J. Alpert
Patent 20160132767
Abstract

Fault-Tolerant Power-Driven Synthesis
Pallab Datta, Gi-Joon Nam, Zhuo Li, Dharmendra S. Modha, Myron D. Flickner, Charles J. Alpert
Patent 20160132769
Abstract

Hardware Architecture for Simulating a Neural Network of Neurons
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Paul A. Merolla, Dharmendra S. Modha
Patent 20160034808

Mapping graphs onto core-based neuromorphic architectures
Arnon Amir, Pallab Datta, Paul A. Merolla, Dharmendra S. Modha
Patent 20160125289
Abstract


2015

Scene understanding using a neurosynaptic system
Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Steven K. Esser, Dharmendra S. Modha
Patent 20150347870
Abstract

Mapping neural dynamics of a neural model on to a coarsely grained look-up table
Rodrigo Alvarez-icaza Rivera, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Paul A. Merolla, Dharmendra S. Modha
Patent 20150227558
Abstract


2014

Hardware architecture for simulating a neural network of neurons
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Paul A. Merolla, Dharmendra S. Modha
Patent US 20140180988 A1
Abstract

Mapping neural dynamics of a neural model on to a coarsely grained look-up table
Rodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Paul A. Merolla, Dharmendra S. Modha
Patent US 20140180985 A1
Abstract


2013

Multi-processor cortical simulations with reciprocal connections with shared weights
Pallab Datta, Steven K. Esser, Dharmendra S. Modha
Patent US 20130339281 A1
Abstract