Zehra Sura  Zehra Sura photo         

contact information

Research Scientist, Systems and Architecture for Machine Learning
Thomas J. Watson Research Center, Yorktown Heights, NY USA
  +1dash914dash945dash1653

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2017

Leveraging OpenMP 4.5 Support in CLANG for Fortran
Sung, Hyojin and Chen, Tong and Sura, Zehra and Islam, Tarique
International Workshop on OpenMP, pp. 33--47, 2017
Abstract

LORE: A Loop Repository for the Evaluation of Compilers
Chen, Zhi and Gong, Zhangxiaowen and Szaday, Justin Josef and Wong, David C and Padua, David and Nicolau, Alexandru and Veidenbaum, Alexander V and Watkinson, Neftali and Sura, Zehra and Maleki, Saeed and others
2017 IEEE International Symposium on Workload Characterization (IISWC), pp. 219--228
Abstract


2016

Scheduling for Clustered Vector Processors Near Memory
Arpith C. Jacob, Zehra Sura, Tong Chen, Carlo Bertolli, Samuel Antao, Olivier Sallenave, Kevin O'Brien, Ravi Nair, Jose R. Brunheroto, Philip Jacob, Bryan S. Rosenburg, Yoonho Park, Alexandre E. Eichenberger, Changhoan Kim
Technical Report, 2016
Abstract

Automatic Copying of Pointer-Based Data Structures
Chen, Tong and Sura, Zehra and Sung, Hyojin
International Workshop on Languages and Compilers for Parallel Computing, pp. 265--281, 2016
Abstract

Approximate computing: Challenges and opportunities
Agrawal, Ankur and Choi, Jungwook and Gopalakrishnan, Kailash and Gupta, Suyog and Nair, Ravi and Oh, Jinwook and Prener, Daniel A and Shukla, Sunil and Srinivasan, Vijayalakshmi and Sura, Zehra
Rebooting Computing (ICRC), IEEE International Conference on, pp. 1--8, 2016

Performance analysis and optimization of Clang's OpenMP 4.5 GPU support
Martineau, Matt and McIntosh-Smith, Simon and Bertolli, Carlo and Jacob, Arpith C and Antao, Samuel F and Eichenberger, Alexandre and Bercea, Gheorghe-Teodor and Chen, Tong and Jin, Tian and O'Brien, Kevin and others
Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), International Workshop on, pp. 54--64, 2016
Abstract

Offloading Support for OpenMP in Clang and LLVM
Antao, Samuel F and Bataev, Alexey and Jacob, Arpith C and Bercea, Gheorghe-Teodor and Eichenberger, Alexandre E and Rokos, Georgios and Martineau, Matt and Jin, Tian and Ozen, Guray and Sura, Zehra and others
Proceedings of the Third Workshop on LLVM Compiler Infrastructure in HPC, pp. 1--11, 2016
Abstract


2015

Progressive codesign of an architecture and compiler using a proxy application
Jacob, Arpith and Nair, Ravi and Chen, Tong and Sura, Zehra and Kim, Changhoan and Bertolli, Carlo and Antao, Samuel and OBrien, Kevin
Computer Architecture and High Performance Computing (SBAC-PAD), 2015 27th International Symposium on, pp. 57--64
Abstract

Towards Performance Portable GPU Programming with RAJA
Jacob, Arpith C and Antao, Samuel F and Sung, Hyojin and Eichenberger, Alexandre E and Bertolli, Carlo and Bercea, Gheorghe-Teodor and Chen, Tong and Sura, Zehra and Rokos, Georgios and O’Brien, Kevin
2015 - hpcport.alcf.anl.gov
Abstract

Exploiting fine-and coarse-grained parallelism using a directive based approach
Jacob, Arpith C and Nair, Ravi and Eichenberger, Alexandre E and Antao, Samuel F and Bertolli, Carlo and Chen, Tong and Sura, Zehra and O’Brien, Kevin and Wong, Michael
International Workshop on OpenMP, pp. 30--41, 2015
Abstract

Performance analysis of openmp on a gpu using a coral proxy application
Bercea, Gheorghe-Teodor and Bertolli, Carlo and Antao, Samuel F and Jacob, Arpith C and Eichenberger, Alexandre E and Chen, Tong and Sura, Zehra and Sung, Hyojin and Rokos, Georgios and Appelhans, David and others
Proceedings of the 6th International Workshop on Performance Modeling, Benchmarking, and Simulation of High Performance Computing Systems, pp. 2, 2015
Abstract

Integrating GPU support for OpenMP offloading directives into Clang
Bertolli, Carlo and Antao, Samuel F and Bercea, Gheorghe-Teodor and Jacob, Arpith C and Eichenberger, Alexandre E and Chen, Tong and Sura, Zehra and Sung, Hyojin and Rokos, Georgios and Appelhans, David and others
Proceedings of the Second Workshop on the LLVM Compiler Infrastructure in HPC, pp. 5, 2015
Abstract

Active Memory Cube: A Processing-in-Memory Architecture for Exascale Systems
Ravi Nair, et al.
IBM Journal of Research and Development (IBM JRD), Vol. 59, Issue 2/3, 2015

Data Access Optimization in a Processing-in-Memory System
Zehra Sura, et al.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015


2014

Coordinating GPU Threads for OpenMP 4.0 in LLVM
C Bertolli, S Antao, A Eichenberger, K O'Brien, Z Sura, A Jacob, T Chen, O Sallenave
Proceedings of the Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC), 2014

Using Multiple Threads to Accelerate Single Thread Performance
Zehra Sura, Kevin OBrien, Jose Brunheroto
Parallel and Distributed Processing Symposium, 2014 IEEE 28th International, pp. 985--994


2010

COMIC++: A software SVM system for heterogeneous multicore accelerator clusters
J Lee, J Lee, S Seo, J Kim, S Kim, Z Sura
High Performance Computer Architecture (HPCA), 2010 IEEE 16th International Symposium on, pp. 1--12


2009

Design and implementation of software-managed caches for multicores with local memory
S Seo, J Lee, Z Sura
High Performance Computer Architecture, 2009, pp. 55--66


2008

COMIC: a coherent shared memory interface for cell be
J Lee, S Seo, C Kim, J Kim, P Chun, Z Sura, J Kim, S Y Han
Proceedings of the 17th international conference on Parallel architectures and compilation techniques, pp. 303--314, 2008

Prefetching irregular references for software cache on cell
T Chen, T Zhang, Z Sura, M G Tallada
Proceedings of the sixth annual IEEE/ACM international symposium on Code generation and optimization, pp. 155--164, 2008

A novel asynchronous software cache implementation for the Cell-BE processor
J Balart, M Gonzalez, X Martorell, E Ayguade, Z Sura, T Chen, T Zhang, K O’brien, K O’brien
Languages and Compilers for Parallel Computing, 125--140, Springer, 2008

Supporting OpenMP on cell
K O’Brien, K O’Brien, Z Sura, T Chen, T Zhang
International Journal of Parallel Programming 36(3), 289--311, Springer, 2008

Hybrid Access-Specific Software Cache Techniques for the Cell BE Architecture
Marc Gonzalez, Nikola Vujic, Alexandre E. Eichenberger, Xavier Martorell, Eduard Ayguade, Tong Chen, Zehra Sura, Tao Zhang, Kevin O'Brien, Kathryn O'Brien
Proceedings of the 17th international conference on Parallel architectures and compilation techniques (PACT), pp. 292--302, 2008


2007

Optimizing the Use of Static Buffers for DMA on a CELL Chip
T Chen, Z Sura, K O’Brien, J O’Brien
Languages and Compilers for Parallel Computing, 314--329, Springer, 2007


2006

Using advanced compiler technology to exploit the performance of the Cell Broadband Engine™ architecture
Eichenberger, Alexandre E and O'Brien, John Kevin and O'Brien, Kathryn M and Wu, Peng and Chen, Tong and Oden, Peter H and Prener, Daniel A and Shepherd, Janice C and So, Byoungro and Sura, Zehra and others
IBM Systems Journal 45(1), 59--84, IBM, 2006
Abstract

Evaluating the impact of thread escape analysis on a memory consistency model-aware compiler
C L Wong, Z Sura, X Fang, K Lee, S Midkiff, J Lee, D Padua
Languages and Compilers for Parallel Computing, 170--184, Springer, 2006

Using advanced compiler technology to exploit the performance of the Cell Broadband Engine
A. Eichenberger, J. K. O'brien, K. M. O'brien, P. Wu, T. Chen, P. H. Oden, D. A. Prener, J. C. Shepherd, Z. Sura, A. Wang, T. Zhang, P. Zhao, M. K. Gschwind, R. Archambault, Y. Gao, R. Koo
IBM Systems Journal 45(1), 59--84, IBM, 2006


2005

Optimizing Compiler for the CELL Processor
J. K. O'Brien, K. M. O'Brien, P. Wu, T. Chen, P. H. Oden, D. A. Prener, J. C. Shepherd, B. So, Z. Sura, A. Wang, T. Zhang, P. Zhao, M. K. Gschwind
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 161--172, IEEE Computer Society, 2005

Automatic implementation of programming language consistency models
Z Sura, C L Wong, X Fang, J Lee, S Midkiff, D Padua
Languages and Compilers for Parallel Computing, 172--187, Springer, 2005

Compiler techniques for high performance sequentially consistent java programs
Z Sura, X Fang, C L Wong, S P Midkiff, J Lee, D Padua
Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, pp. 2--13, 2005


2004



2002

The Pensieve project: A compiler infrastructure for memory models
C L Wong, Z Sura, X Fang, S P Midkiff, J Lee, D Padua
Parallel Architectures, Algorithms and Networks, 2002, pp. 209--214

Instance-wise points-to analysis for loop-based dependence testing
P. Wu, P. Feautrier, D. Padua, Z. Sura
Proceedings of the 16th international conference on Supercomputing, pp. 262--273, ACM, 2002


2001



Year Unknown

Rebooting the Data Access Hierarchy of Computing Systems
Wen-mei, W Hwu and El Hajj, Izzat and de Gonzalo, Simon Garcia and Pearson, Carl and Kim, Nam Sung and Chen, Deming and Xiong, Jinjun and Sura, Zehra
Urbana51, 61801
Abstract