Dionysios Diamantopoulos  Dionysios Diamantopoulos photo         

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Research Staff Member
Zurich Research Laboratory, Zurich, Switzerland
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Professional Associations

Professional Associations:  HiPEAC  |  IEEE  |  IEEE Circuits and System Society  |  Technical Chamber of Greece  |  The OpenPOWER Foundation

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More information:  diamantopoulos.github.io  |  dblp  |  Linkedin  |  Scholar  |  Acclaim


2022

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric
Gagandeep Singh, Dionysios Diamantopoulos, Juan G\'omez-Luna, Christoph Hagleitner, Sander Stuijk, Henk Corporaal, Onur Mutlu
ACM Trans. Reconfigurable Technol. Syst. 15(4), Association for Computing Machinery, 2022
Abstract


2021

Exploiting HBM on FPGAs for Data Processing
Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso
ACM Trans. Reconfigurable Technol. Syst., Association for Computing Machinery, 2021
Abstract   Just Accepted

Acceleration-as-a-microService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs
Dionysios Diamantopoulos, Raphael Polig, Burkhard Ringlein, Mitra Purandare, Beat Weiss, Christoph Hagleitner, Mark A. Lantz, Francois Abel
2021 IEEE 14th International Conference on Cloud Computing (CLOUD), pp. 726-729
Abstract

A Case for Function-as-a-Service with Disaggregated FPGAs
B. Ringlein, F. Abel, and D. Diamantopoulos, B. Weiss, C. Hagleitner, M. Reichenbach, D. Fey
Proceedings of the 2021 IEEE 14\textsuperscriptth International Conference on Cloud Computing (CLOUD 2021), pp. 333--344, IEEE
Abstract

NERO: Accelerating Weather Prediction using Near-Memory Reconfigurable Fabric
Gagandeep Singh, Dionysios Diamantopoulos, Juan Gomez-Luna, Christoph Hagleitner, Sander Stuijk, Henk Corporaal, Onur Mutlu
arXiv preprint arXiv:2107.08716, 2021
Abstract   energy consumption, stencil, efficient energy use, weather and climate, flops, acceleration, field programmable gate array, computational science, interface, computer science

An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment
Abbas Haghi, Santiago Marco-Sola, Lluc Alvarez, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moreto
2021 31st International Conference on Field-Programmable Logic and Applications (FPL), pp. 151-159, IEEE Computer Society
Abstract   field programmable gate array, software, wavefront, process, reference genome, algorithm, computer science, energy, next generation network, personalized medicine

Heterogeneous Computing Systems for Complex Scientific Discovery Workflows
Christoph Hagleitner, Dionysios Diamantopoulos, Burkhard Ringlein, Constantinos Evangelinos, Charles Johns, Rong N. Chang, Bruce DAmora, James A. Kahle, James Sexton, Michael Johnston, Edward Pyzer-Knapp, Chris Ward
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 13-18
Abstract   symmetric multiprocessor system, green computing, heterogeneous network, supercomputer, systems architecture, workflow, efficient energy use, systems design, distributed computing, computer science

Modeling FPGA-Based Systems via Few-Shot Learning
Gagandeep Singh, Dionysios Diamantopoulos, Juan Gomez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal
The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ACM
Abstract   leverage, process, computer engineering, field programmable gate array, performance prediction, computer science, local system, downstream, transfer, cloud systems

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms
Christian Pilato, Stanislav Bohm, Fabien Brocheton, Jeronimo Castrillon, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninova, Christoph Hagleitner
2021 Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1320-1325
Abstract   big data, cloud computing, virtualization, programming paradigm, knowledge extraction, use case, distributed computing, computer science, key, matching

FPGA-based Near-Memory Acceleration of Modern Data-Intensive Applications
Gagandeep Singh, Mohammed Alser, Damla Senol Cali, Dionysios Diamantopoulos, Juan Gomez-Luna, Henk Corporaal, Onur Mutlu
IEEE Micro, 2021
Abstract   bottleneck, efficient energy use, field programmable gate array, embedded system, leverage, ibm, computer science, computation, energy, acceleration


2020

A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA
Abbas Haghi, Lluc Alvarez, Jorda Polo, Dionysios Diamantopoulos, Christoph Hagleitner, Miquel Moreto
2020 30th International Conference on Field-Programmable Logic and Applications (FPL), pp. 57-64
Abstract   central processing unit, field programmable gate array, software, embedded system, k mer, ibm, computer science, co design, dna mutation, hardware software

High Bandwidth Memory on FPGAs: A Data Analytics Perspective
Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso
2020 30th International Conference on Field-Programmable Logic and Applications (FPL), pp. 1-8
Abstract   throughput, high bandwidth memory, hash join, field programmable gate array, distributed computing, data analysis, computer science, computer architecture, bottleneck, bandwidth, analytics

XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs
Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gurkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini
2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
Abstract   software, embedded system, computer science, cloud systems, agile software development

Agile Autotuning of a Transprecision Tensor Accelerator Overlay for TVM Compiler Stack
Dionysios Diamantopoulos, Burkhard Ringlein, Mitra Purandare, Gagandeep Singh, Christoph Hagleitner
arXiv preprint arXiv:2004.10854, 2020
Abstract   overlay, field programmable gate array, distributed computing, convergence, control reconfiguration, computer science, computer architecture, compiler, architecture, agile software development, adaptability

NERO: A Near High-Bandwidth Memory Stencil Accelerator for Weather Prediction Modeling
Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Juan Gomez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal
2020 30th International Conference on Field-Programmable Logic and Applications (FPL), pp. 9-17
Abstract   weather and climate, stencil, high bandwidth memory, field programmable gate array, flops, energy consumption, efficient energy use, computer science, computational science, acceleration

PHRYCTORIA: A Messaging System for Transprecision OpenCAPI-attached FPGA Accelerators
Dionysios Diamantopoulos, Mitra Purandare, Burkhard Ringlein, Christoph Hagleitner
2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
field programmable gate array, embedded system, computer science


2019

Near-Memory Transprecision Accelerators using CAPI/OpenCAPI and SNAP
Dionysios Diamantopoulos
OpenPOWER Summit Europe, 2019
Abstract

NARMADA: Near-Memory Horizontal Diffusion Accelerator for Scalable Stencil Computations
Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Sander Stuijk, Henk Corporaal
2019 29th International Conference on Field Programmable Logic and Applications (FPL), pp. 263-269
Abstract   thread, stencil, static random access memory, scalability, parallel computing, memory model, memory hierarchy, kernel, field programmable gate array, computer science

HelmGemm: Managing GPUs and FPGAs for transprecision GEMM workloads in containerized environments
Dionysios Diamantopoulos, Christoph Hagleitner
2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 71--74

Low Precision Processing for High Order Stencil Computations
Gagandeep Singh, Dionysios Diamantopoulos, Sander Stuijk, Christoph Hagleitner, Henk Corporaal
International Conference on Embedded Computer Systems, pp. 403--415, 2019

Coherently Attached Programmable Near-Memory Acceleration Platform and its application to Stencil Processing
Jan van Lunteren, Ronald Luijten, Dionysios Diamantopoulos, Florian Auernhammer, Christoph Hagleitner, Lorenzo Chelini, Stefano Corda, Gagandeep Singh
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 668-673
stencil, parallel computing, computer science, computational science, acceleration


2018

Transprecision Computing
Dionysios Diamantopoulos
OpenPOWER Summit Europe, 2018

A System-Level Transprecision FPGA Accelerator for BLSTM Using On-chip Memory Reshaping
Dionysios Diamantopoulos, Christoph Hagleitner
2018 International Conference on Field-Programmable Technology (FPT), pp. 338--341

ecTALK: Energy efficient coherent transprecision accelerators The bidirectional long short-term memory neural network case
Dionysios Diamantopoulos, Heiner Giefers, Christoph Hagleitner
2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-3
Abstract   system on a chip, software design, software, parallel computing, power8, field programmable gate array, efficient energy use, computer science, architecture, arbitrary precision arithmetic

Extending the POWER Architecture with Transprecision Co-Processors
Giefers, Heiner and Diamantopoulos, Dionysios
Circuits and Systems (ISCAS), 2018 IEEE International Symposium on, pp. 1--5
Abstract


2017

On supporting rapid prototyping of embedded systems with reconfigurable architectures
Ioannis Koutras, Konstantinos Maragos, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris
Integration58, 91-100, 2017
Abstract   software, real time computing, rapid prototyping, pareto principle, genetic algorithm, computer science, computer engineering, computer architecture

An fpga-based integrated mapreduce accelerator platform
Kachris, Christoforos and Diamantopoulos, Dionysios and Sirakoulis, Georgios Ch and Soudris, Dimitrios
Journal of Signal Processing Systems 87(3), 357--369, Springer, 2017
Abstract


2015

TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools
Siozios, Kostas and Figuli, Peter and Sidiropoulos, Harry and Tradowsky, Carsten and Diamantopoulos, Dionysios and Maragos, Konstantinos and Delicia, Shalina Percy and Soudris, Dimitrios and Becker, J{\"u}rgen
International Symposium on Applied Reconfigurable Computing, pp. 103--114, 2015
Abstract

Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures
Sotiriou-Xanthopoulos, Efstathios and Diamantopoulos, Dionysios and Economakos, George
International Symposium on Applied Reconfigurable Computing, pp. 321--330, 2015
Abstract

A Framework for Rapid System-Level Synthesis Targeting to Reconfigurable Platforms
Diamantopoulos, Dionysios and Galanis, Ioannis and Siozios, Kostas and Economakos, George and Soudris, Dimitrios
Workshop on Reconfigurable Computing (WRC), 2015
Abstract

GENESIS: Parallel application placement onto reconfigurable architectures (invited for the special issue on runtime management)
Diamantopoulos, Dionysios and Siozios, Kostas and Xydis, Sotirios and Soudris, Dimitrios
ACM Transactions on Embedded Computing Systems (TECS) 14(1), 18, ACM, 2015
Abstract

High-Level-Synthesis Extensions for Scalable Single-Chip Many-Accelerators on FPGAs
Diamantopoulos, Dionysios and Xydis, Sotirios and Siozios, Kostas and Soudris, Dimitrios
Field Programmable Logic and Applications (FPL), 2015 25th International Conference on, pp. 1--2
Abstract

SPARTAN/SEXTANT/COMPASS: advancing space rover vision via reconfigurable platforms
Lentaris, George and Stamoulias, Ioannis and Diamantopoulos, Dionysios and Maragos, Konstantinos and Siozios, Kostas and Soudris, Dimitrios and Rodrigalvarez, Marcos Aviles and Lourakis, Manolis and Zabulis, Xenophon and Kostavelis, Ioannis and others
International Symposium on Applied Reconfigurable Computing, pp. 475--486, 2015
Abstract

Mitigating memory-induced dark silicon in many-accelerator architectures
Diamantopoulos, Dionysios and Xydis, Sotirios and Siozios, Kostas and Soudris, Dimitrios
IEEE Computer Architecture Letters 14(2), 136--139, IEEE, 2015
Abstract

High-level synthesizable dataflow mapreduce accelerator for fpga-coupled data centers
Diamantopoulos, Dionysios and Kachris, Christoforos
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on, pp. 26--33
Abstract

Dynamic memory management in vivado-hls for scalable many-accelerator architectures
Diamantopoulos, Dionysios and Xydis, Sotirios and Siozios, Kostas and Soudris, Dimitrios
International Symposium on Applied Reconfigurable Computing, pp. 117--128, 2015
Abstract


2014

On Designing 3-D Platforms
Tatas, Konstantinos and Siozios, Kostas and Soudris, Dimitrios and Jantsch, Axel (This book chapter was contributed by Dionysios Diamantopoulos, Kostas Siozios, George Economakos, and Dimitrios Soudris of the School of ECE, National Technical University of Athens.)
Designing 2D and 3D Network-on-Chip Architectures, pp. 209--236, Springer, 2014
Abstract

Using high-level synthesis to build memory and datapath optimized DSP accelerators
Diamantopoulos, Dionysios and Economakos, George and Reisis, Dionysios
Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on, pp. 714--717
Abstract

A framework for rapid evaluation of heterogeneous 3-D NoC architectures
Sotiriou-Xanthopoulos, Efstathios and Diamantopoulos, Dionysios and Siozios, Kostas and Economakos, George and Soudris, Dimitrios
Microprocessors and Microsystems 38(4), 292--303, Elsevier, 2014
Abstract

Plug\&chip: A framework for supporting rapid prototyping of 3d hybrid virtual socs
Diamantopoulos, Dionysios and Sotiriou-Xanthopoulos, Efstathios and Siozios, Kostas and Economakos, George and Soudris, Dimitrios
ACM Transactions on Embedded Computing Systems (TECS) 13(5s), 168, ACM, 2014
Abstract

Spartan: Developing a vision system for future autonomous space exploration robots
Kostavelis, Ioannis and Nalpantidis, Lazaros and Boukas, Evangelos and Rodrigalvarez, Marcos Aviles and Stamoulias, Ioannis and Lentaris, George and Diamantopoulos, Dionysios and Siozios, Kostas and Soudris, Dimitrios and Gasteratos, Antonios
Journal of Field Robotics 31(1), 107--140, Wiley Online Library, 2014
Abstract


2013

SPARTAN: Efficient Implementation of Computer Vision Algorithms for Autonomous Rover Navigation
Lentaris, George and Diamantopoulos, Dionysios and Siozios, Kostas and Stamoulias, Ioannis and Kostavelis, Ioannis and Boukas, Evangelos and Nalpantidis, Lazaros and Soudris, Dimitrios and Gasteratos, Antonios and Aviles, M
7th HiPEAC Workshop on Reconfigurable Computing, pp. 1--10, 2013
Abstract

HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips
Diamantopoulos, Dionysios and Siozios, Kostas and Sotiriou-Xanthopoulos, Efstathios and Economakos, George and Soudris, Dimitrios
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2013 IEEE 27th International, pp. 2194--2199
Abstract

A new design paradigm for floating point DSP applications based on ESL/HLS and FPGAs?
Diamantopoulos, Dionysios and Economakos, Christoforos and Soudris, Dimitrios and Economakos, George
Signal Processing and Information Technology (ISSPIT), 2013 IEEE International Symposium on, pp. 000404--000409
Abstract

A Framework for Performing Fault-Tolerant Placement Based on Genetic Algorithm
Diamantopoulos, Dionysios and Siozios, Kostas and Soudris, Dimitrios
Workshop on Reconfigurable Computing (WRC), 2013
Abstract


2012

On Designing Self-Aware Reconfigurable Platforms
Kostas Siozios, H. Sidiropoulos, D. Diamantopoulos, P. Figuli, D. Soudris, M. Huebner, J. Becker
22nd International Conference on Field Programmable Logic and Applications (FPL 2012) : Oslo, Norway, 29 - 31 August 2012
self aware, parallel computing, computer science, computer architecture

Framework for performing rapid evaluation of 3D SoCs
D. Diamantopoulos, K. Siozios, D. Soudris
Electronics Letters 48(12), 679-681, 2012
Abstract   silver bullet, semiconductor, scaling, physical design, form factor, engineering, electronic engineering, chip

FPGA-based path-planning of high mobility rover for future planetary missions
Lentaris, George and Diamantopoulos, Dionysios and Stamoulias, G and Siozios, Kostas and Soudris, Dimitrios and Rodrig{\'a}lvarez, M Avil{\'e}s
Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International Conference on, pp. 85--88
Abstract

A systematic methodology for reliability improvements on SoC-based software defined radio systems
Diamantopoulos, Dionysios and Siozios, Kostas and Xydis, Sotiris and Soudris, Dimitrios
VLSI Design2012, 13, Hindawi Publishing Corp.
Abstract

Hardware implementation of stereo correspondence algorithm for the exomars mission
Lentaris, George and Diamantopoulos, Dionysios and Siozios, Kostas and Soudris, Dimitrios and Rodrig{\'a}lvarez, M Avil{\'e}s
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on, pp. 667--670
Abstract

SPARTAN project: On profiling computer vision algorithms for rover navigation
Diamantopoulos, Dionysios and Siozios, Kostas and Lentaris, George and Soudris, Dimitrios and Rodrigalvarez, Marcos Aviles
Adaptive Hardware and Systems (AHS), 2012 NASA/ESA Conference on, pp. 174--181
Abstract


2011

Thermal optimization for micro-architectures through selective block replication
Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris
2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, pp. 59-66
Abstract   thermal, temperature control, system on a chip, power density, parallel computing, microarchitecture, materials science, kelvin, chip, architecture

A co-design methodology for implementing computer vision algorithms for rover navigation onto reconfigurable hardware
Avil{\'e}s, Marcos and Siozios, Kostas and Diamantopoulos, Dionysios and Nalpantidis, Lazaros and Kostavelis, Ioannis and Boukas, Evangelos and Soudris, Dimitrios and Gasteratos, Antonios
FPL2011 Workshop on Computer Vision on Low-Power Reconfigurable Architectures September 4, 2011, Chania, Crete, Greece, pp. 9--10
Abstract

Design and experimentation with low-power morphable multipliers
Sotiriou-Xanthopoulos, Efstathios and Diamantopoulos, Dionysios and Economakos, George and Soudris, Dimitrios
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on, pp. 752--755
Abstract

Configurable baseband digital transceiver for Gbps wireless 60 GHz communications
Diamantopoulos, Dionysios and Galiatsatos, Panagiotis and Karachalios, Athanasios and Lentaris, George and Reisis, D and Soudris, Dimitrios
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on, pp. 192--195
Abstract

SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications
Siozios, Kostas and Diamantopoulos, Dionysios and Kostavelis, Ioannis and Boukas, Evangelos and Nalpantidis, Lazaros and Soudris, Dimitrios and Gasteratos, Antonios and Avil{\'e}s, Marcos and Anagnostopoulos, Iraklis
Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011 6th International Workshop on, pp. 1--9
Abstract


Year Unknown



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