Dharmendra S. Modha  Dharmendra S. Modha photo         

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IBM Fellow; IBM Chief Scientist - Brain-inspired Computing
IBM Research - Almaden


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More information:  Dharmendra S Modha's Blog

  • IBM 39th Plateau Inventor.
  • 2016 Scientist of the Year, R&D Magazine, November 3, 2016.  Cover Story 
  • TrueNorth accepted into the Computer History Museum, August 12, 2016. Link
  • Misha Mahowald Prize, July 28, 2016.  Link
  • 1st Place, IBM Pat Goldberg Math / CS / EE Best Paper Award for 2014, Awarded on December 14, 2015.
  • R&D 100 Award plus Editor's Choice, IT/Electrical Category, 2015. Link 
  • Distinguished Alumunus Award, Indian Institute of Technology, March 10, 2015.
  • Runners-up, 2014 Breakthrough of the Year, Science. Link
  • ACM Gordon Bell Prize Finalist, Supercomputing 2014.
  • Best of IBM, 2014 (500 selected out 430,000+ IBMers).
  • IBM Fellow, Class of 2014.
  • Test of Time Award at USENIX's FAST 2014 Conference for "ARC: A Self-Tuning, Low Overhead Replacement Cache" published in 2003.
  • Best Paper Award at 3rd International Conference on Integration of Design, Engineering, & Management for Innovation, September 2013.
  • Best of IBM, 2013 (500 selected out 430,000+ IBMers).
  • First Place, 2012 Science/NSF International Science & Engineering Visualization Challenge, Illustration Category. Featured on Cover of Science.
  • EE Times 40th Anniversary: 10 electronics visionaries to watch, 2012.
  • World Technology Network Fellow, 2012.
  • Best Paper Finalist at Supercomputing, 2012 (6 Selected Amongst 472).
  • Best Paper Award at ASYNC 2012: IEEE International Symposium on Asynchronous Circuits and Systems.
  • Best Innovation Moments of 2011, The Washington Post, Decemeber 13, 2011.
  • World Changing Ideas, 10 new technologies that will make a difference, Scientific American, December, 2011.
  • IEEE Fellow, 2011. Citation: "for contribution to cognitive computing and caching algorithms".
  • IBM Pat Goldberg Best Paper Award in Computer Science, Electrical Engineering, and Mathematics, 2009.

    Award Citation: "The work reported in this paper is truly multidisciplinary, combining both neuroscience (physiology and anatomy of the brain) with computer science (parallelism, scaling, performance evaluation). The paper won the prestigious 2009 ACM Gorden Bell Award. It is a "tour-de-force" in supercomputing, in the sense that it uses very large configurations of Blue Gene/P (36k nodes and 144 TB of memory) to their fullest. The computations are CPU intensive, memory intensive, communication intensive, I/O intensive, and prone to load-imbalance. Several challenges had to be addressed before this application could run at the scale and performance reported. The performance evaluation is very detailed, reporting scaling results for all modes of execution. Both weak and strong scaling are reported. In addition to measuring execution time, more detailed measurements with performance counters were also performed. The scientific result is unprecedented. The authors were the first to simulate a cortex at the scale of a cat cortex. This scale is more than an order of magnitude larger than that of any previously reported cortical simulations. The collaboration between a group of scientists with widely different backgrounds makes this work particularly attractive."

  • Member, IBM Academy of Technology, 2010.
  • ACM Gordon Bell Prize, 2009.
  • IBM Supplemental Patent Issue Award, 2008.
  • IBM Master Inventor, 2008-2010.
  • Two IBM Supplemental Patent Issue Awards, 2007.
  • IBM Outstanding Innovation Award, 2004.

    Award Citation: "...for their contributions to creating Adaptive Replacement Cache and incorporating it in IBM's Enterprise Storage Server products. Caching is used widely in storage systems, databases, web servers, middleware, processors, file systems, disk drives, RAID controllers, operating systems and in numerous other applications. For nearly four decades, the Least Recently Used (LRU) algorithm and its variants have remained the popular class of cache replacement policies. A long-standing question in cache management has been: Is it possible to improve on LRU across a wide range of workloads and cache sizes without incurring excess overhead or requiring workload-specific pre-tuning? Hundreds of attempts have been made, most significantly, FBR, LRU-2, 2Q, LRFU and MQ. However, until now, none has been universally successful. Adaptive Replacement Cache (ARC) dynamically adapts between recency (LRU) and frequency (Least Frequenty Used (LFU)) to achieve higher cache hit rates, which imply better performance for a server or application. ARC was successfully transferred to IBM's Enterprise Storage Server (ESS) products (DS 6000 and DS 8000) and was included in the product announcements as a significant innovation. On mixed random and sequential workloads, ARC was found to notably increase the cache hit rate of ESS on random workload (almost 2x in some cases) without impairing the hit rate on sequential workloads."

  • IBM Pat Goldberg Best Paper Award in Computer Science, Electrical Engineering, and Mathematics (5 selected from 156 submitted), 2004.

    Award Citation: "While many algorithms have been proposed for page replacement in caches over the years, Least Recently Used (LRU), one of the oldest algorithms, has remained largely popular given its simplicity, ease of implementation and low overhead. The Adaptive Replacement Cache (ARC) algorithm proposed in this paper is an elegant scheme that dynamically adapts itself to the changing characteristics of workloads without requiring any user-defined tuning parameters as many other attempts to improve on LRU have. The paper clearly covers the work done in cache replacement algorithms in the past, builds up the motivation for ARC and clearly describes the self-tuning nature. The results brought out in the paper convincingly show ARC consistently outperforming LRU. Like LRU, the algorithm has constant time complexity with regard to cache size and is simple to implement. It is expected that ARC will be used in storage systems as well as in several other applications that utilize caches such as virtualizers, databases and file systems. The ARC paper was presented in FAST '03, a key conference for Storage Systems and subsequently in Computer. A follow-on to ARC appeared in FAST '04."

  • IBM Outstanding Technical Achievement Award, 2002.

    Award Citation: "... for their contributions to the ideas and algorithms used in the eClassifier text-analysis tool and for their roles in its implementation into a variety of IBM Global Services (IGS) applications. The eClassifier system integrates technologies for classification, taxonomy management, trend detection, document feature understanding and visualization into an innovative, interactive tool and runtime for exploring large collections (e.g. millions of documents) of text. It has been used within several important IGS HelpDesk systems; several IGS strategic outsourcing engagements; several IGS productivity-improving systems, and, most recently, the Lotus Discovery Server, Release 2, Knowledge Management product."

  • IBM Communications Systems Best Paper Award, 2001.

    Award Citation: "The prize paper provides both a theoretical underpinning and practical instances of codes which deal with the problem of quasi-catastrophic error propagation in Maximum Transition Run (MTR) codes. The unifying theory presented led to an exhaustive characterization of these codes and revealed a connection between the conventional modulation codes used in disk drives and the recently discovered MTR codes. Instances of the specific codes described are already used in the digital recording industry. Finally, the theoretical framework provided led to the design of the combined MTR/parity codes that are being used in all current IBM hard-disk drives, including IBM's Microdrive."