Keiji Matsumoto           

Publications(2011-2014/8)

1. Semi-Therm 2014 (Semiconductor Thermal Measurement and Management Symposium 2014)

Title : High thermal conductivity underfill for the thermal management of three-dimensional (3D) chip stacks

Authors : Keiji Matsumoto, Hiroyuki Mori, Yasumitsu Orii, Hideki Kiritani(Mitsubishi Chemical Corporation (MCC)), Yasuhiro Kawase(MCC), Makoto Ikemoto(MCC), Masanori Yamazaki(MCC), Masaya Sugiyama(MCC), Fumikazu Mizutani(MCC)

2. 3D-IC 2013 (IEEE International 3D Systems Integration Conference) (accepted as poster presentation, but declined presentation, because the overseas trip for poster presentation is not allowed)

      Title : Thermal design guideline and new cooling solution for a three-dimensional (3D) chip stack

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET), Hiroyuki Mori, Yasumitsu Orii, Fumiaki Yamada, Kohei Fujihara(Denso), Junichi Takamatsu(Denso), Koji Kondo(Denso)

3. Semi-Therm 2013

Title : Thermal design guidelines for a three-dimensional (3D) chip stack, including cooling solutions.

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

4. Semi-Therm 2012

Title : Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack, including the transient measurements

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

5. Semi-Therm 2011

Title : Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi (ASET), Yasumitsu Orii and Fumiaki Yamada

6. EMAP 2011 (13th International Conference on Electronics Materials and Packaging)

Title : Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack, focusing on TSV (Through-Silicon-Via)

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

7. Journal of JIEP (Japan Institute of Electronics Packaging) 2012

      Title : Structure analysis and thermal analysis for future packaging

      Authors : Keiji Matsumoto, Sayuri Kohara, Keishi Okamoto, Yasumitsu Orii

      (This is also published in “Surface Mount Technology” of Korea.)

8. 51^st National Heat Transfer Symposium of Japan 2014

       Title : Challenges of thermal management for three-dimensional (3D) packaging

Authors : Keiji Matsumoto,

9. Mate 2013 (Symposium on micro-interconnection and packaging technology)

Title : Evaluation of the thermal resistance of a three-dimensional (3D) chip stack and appropriate cooling solutions

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

10. Mate 2012

Title : Thermal characterization of a three-dimensional (3D) chip stack, focusing on TSV(Through-Silicon-Via)

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

11. Mate 2011

Title : Thermal characterization of a three-dimensional (3D) chip stack based on experiments and simulation

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

12. Symposium of thermal management 2013

      Title : Thermal characterization and management of a three-dimensional (3D) packaging

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

13. Technical division(RC259) of the Japan Society of Mechanical Engineering 2013

Title : Thermal characterization of a three-dimensional (3D) packaging

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET) Yasumitsu Orii and Fumiaki Yamada

14.  Cybernet seminar on Warp Simulation Tool (2013/2/22)

      Title : Laminate warp prediction method

Authors : Keiji Matsumoto, Keishi Okamoto, Yasumitsu Orii, Hiroyuki Mori, Hien Dang, Sri Sri-Jayantah

15. Technical seminar held by “Electric Journal” (2013/6/13)

      Title : Thermal resistance and appropriate cooling solutions for 3D chip stack

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET), Hiroyuki Mori, Yasumitsu Orii, Fumiaki Yamada, Kohei Fujihara(Denso), Junichi Takamatsu(Denso), Koji Kondo(Denso)

16. Thermal management division of JIEP (Japan Institute of Electronics Packaging) (2013/7/11)

Title : Thermal resistance evaluation of a three-dimensional (3D) chip stack and also, of cooling solutions.

Authors : Keiji Matsumoto , Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET), Yasumitsu Orii and Fumiaki Yamada, Kohei Fujihara(Denso), Junichi Takamatsu(Denso), Koji Kondo(Denso)

17. Thermal design forum (2013/7/22)

      Title : Thermal resistance and appropriate cooling solutions for 3D chip stack

Authors : Keiji Matsumoto, Soichiro Ibaraki(ASET), Kuniaki Sueoka, Katsuyuki Sakuma, Hidekazu Kikuchi(ASET), Hiroyuki Mori, Yasumitsu Orii, Fumiaki Yamada, Kohei Fujihara(Denso), Junichi Takamatsu(Denso), Koji Kondo(Denso)

Co-authors (An extract version)

1. Best paper award at ICEP(International Conference on Electronics Packaging) 2013

Title : Cooling strategy and structure of 3D integrated image sensor for auto-mobile application

Authors : F. Yamada, K. Matsumoto, T. Hatakeyama(Toyama Pref. Univ.), M. Ishizuka(Toyama Pref. Univ.), K. Otsuka (Meisei Univ.),K. Kondo(Denso), H. Kobayashi (ASET), K. Sueoka, A. Horibe, S. Kohara, H. Mori, and Y. Orii,

2. IMAPS 2014 (47th International Microelectronics Assembly and Packaging Society)

Title : Pre-applied Inter Chip Fill for 3D-IC Joining

Authors : Yasuhiro Kawase (MCC), Makoto Ikemoto (MCC), Masaya Sugiyama (MCC), Hideki Kiritani (MCC), Fumikazu Mizutani (MCC), Keiji Matsumoto, Hiroyuki Mori, Yasumitsu Orii

3. IMAPS 2013

Title : High Thermal Conductive Inter Chip Fill for 3D-IC through Pre-applied Joining Process

Authors : Yasuhiro Kawase (MCC), Makoto Ikemoto (MCC), Masanori Yamazaki (MCC), Masaya Sugiyama (MCC), Hideki Kiritani (MCC), Fumikazu Mizutani (MCC)

Keiji Matsumoto, Akihiro Horibe, Hiroyuki Mori, Yasumitsu Orii

4.  3D IC 2012

      Title : Thermal stress analysis of die stacks with fine-pitch IMC interconnections for 3D integration

Authors : Sayuri Kohara, Akihiro Horibe, Kuniaki Sueoka, Katsuyuki Sakuma, Keiji Matsumoto, Fumiaki Yamada, Takahiro Kinoshita and Takashi Kawakami (Toyama Prefectural Univ.)